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0c658c48cb
With the recent imx-drm device tree binding changes, we need to add IPU DI ports and endpoints for adapting. Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Acked-by: Lothar Waßmann <LW@KARO-electronics.de>
325 lines
7.8 KiB
Plaintext
325 lines
7.8 KiB
Plaintext
/*
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* Copyright 2013 Lothar Waßmann <LW@KARO-electronics.de>
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/dts-v1/;
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#include "imx53-tx53.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/pwm/pwm.h>
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/ {
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model = "Ka-Ro electronics TX53 module (LCD)";
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compatible = "karo,tx53", "fsl,imx53";
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aliases {
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display = &display;
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};
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soc {
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display: display@di0 {
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compatible = "fsl,imx-parallel-display";
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interface-pix-fmt = "rgb24";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_rgb24_vga1>;
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status = "okay";
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port {
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display0_in: endpoint {
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remote-endpoint = <&ipu_di0_disp0>;
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};
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};
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display-timings {
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VGA {
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clock-frequency = <25200000>;
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hactive = <640>;
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vactive = <480>;
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hback-porch = <48>;
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hsync-len = <96>;
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hfront-porch = <16>;
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vback-porch = <31>;
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vsync-len = <2>;
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vfront-porch = <12>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <1>;
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pixelclk-active = <0>;
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};
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ETV570 {
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clock-frequency = <25200000>;
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hactive = <640>;
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vactive = <480>;
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hback-porch = <114>;
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hsync-len = <30>;
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hfront-porch = <16>;
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vback-porch = <32>;
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vsync-len = <3>;
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vfront-porch = <10>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <1>;
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pixelclk-active = <0>;
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};
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ET0350 {
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clock-frequency = <6413760>;
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hactive = <320>;
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vactive = <240>;
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hback-porch = <34>;
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hsync-len = <34>;
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hfront-porch = <20>;
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vback-porch = <15>;
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vsync-len = <3>;
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vfront-porch = <4>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <1>;
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pixelclk-active = <0>;
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};
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ET0430 {
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clock-frequency = <9009000>;
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hactive = <480>;
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vactive = <272>;
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hback-porch = <2>;
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hsync-len = <41>;
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hfront-porch = <2>;
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vback-porch = <2>;
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vsync-len = <10>;
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vfront-porch = <2>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <1>;
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pixelclk-active = <1>;
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};
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ET0500 {
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clock-frequency = <33264000>;
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hactive = <800>;
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vactive = <480>;
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hback-porch = <88>;
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hsync-len = <128>;
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hfront-porch = <40>;
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vback-porch = <33>;
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vsync-len = <2>;
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vfront-porch = <10>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <1>;
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pixelclk-active = <0>;
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};
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ET0700 { /* same as ET0500 */
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clock-frequency = <33264000>;
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hactive = <800>;
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vactive = <480>;
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hback-porch = <88>;
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hsync-len = <128>;
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hfront-porch = <40>;
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vback-porch = <33>;
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vsync-len = <2>;
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vfront-porch = <10>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <1>;
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pixelclk-active = <0>;
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};
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ETQ570 {
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clock-frequency = <6596040>;
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hactive = <320>;
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vactive = <240>;
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hback-porch = <38>;
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hsync-len = <30>;
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hfront-porch = <30>;
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vback-porch = <16>;
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vsync-len = <3>;
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vfront-porch = <4>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <1>;
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pixelclk-active = <0>;
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};
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};
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};
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};
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backlight: backlight {
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compatible = "pwm-backlight";
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pwms = <&pwm2 0 500000 PWM_POLARITY_INVERTED>;
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power-supply = <®_3v3>;
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brightness-levels = <
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0 1 2 3 4 5 6 7 8 9
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10 11 12 13 14 15 16 17 18 19
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20 21 22 23 24 25 26 27 28 29
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30 31 32 33 34 35 36 37 38 39
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40 41 42 43 44 45 46 47 48 49
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50 51 52 53 54 55 56 57 58 59
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60 61 62 63 64 65 66 67 68 69
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70 71 72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87 88 89
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90 91 92 93 94 95 96 97 98 99
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100
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>;
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default-brightness-level = <50>;
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};
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regulators {
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reg_lcd_pwr: regulator@5 {
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compatible = "regulator-fixed";
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reg = <5>;
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regulator-name = "LCD POWER";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-boot-on;
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};
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reg_lcd_reset: regulator@6 {
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compatible = "regulator-fixed";
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reg = <6>;
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regulator-name = "LCD RESET";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-boot-on;
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};
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};
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};
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&i2c3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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sgtl5000: codec@0a {
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compatible = "fsl,sgtl5000";
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reg = <0x0a>;
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VDDA-supply = <®_2v5>;
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VDDIO-supply = <®_3v3>;
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clocks = <&mclk>;
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};
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polytouch: edt-ft5x06@38 {
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compatible = "edt,edt-ft5x06";
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reg = <0x38>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_edt_ft5x06_1>;
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interrupt-parent = <&gpio6>;
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interrupts = <15 0>;
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reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
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wake-gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
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};
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touchscreen: tsc2007@48 {
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compatible = "ti,tsc2007";
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reg = <0x48>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_tsc2007>;
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interrupt-parent = <&gpio3>;
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interrupts = <26 0>;
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gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
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ti,x-plate-ohms = <660>;
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linux,wakeup;
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};
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};
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&iomuxc {
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imx53-tx53-x03x {
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pinctrl_edt_ft5x06_1: edt-ft5x06grp-1 {
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fsl,pins = <
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MX53_PAD_NANDF_CS2__GPIO6_15 0x1f0 /* Interrupt */
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MX53_PAD_EIM_A16__GPIO2_22 0x04 /* Reset */
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MX53_PAD_EIM_A17__GPIO2_21 0x04 /* Wake */
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>;
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};
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pinctrl_kpp: kppgrp {
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fsl,pins = <
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MX53_PAD_GPIO_9__KPP_COL_6 0x1f4
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MX53_PAD_GPIO_4__KPP_COL_7 0x1f4
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MX53_PAD_KEY_COL2__KPP_COL_2 0x1f4
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MX53_PAD_KEY_COL3__KPP_COL_3 0x1f4
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MX53_PAD_GPIO_2__KPP_ROW_6 0x1f4
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MX53_PAD_GPIO_5__KPP_ROW_7 0x1f4
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MX53_PAD_KEY_ROW2__KPP_ROW_2 0x1f4
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MX53_PAD_KEY_ROW3__KPP_ROW_3 0x1f4
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>;
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};
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pinctrl_rgb24_vga1: rgb24-vgagrp1 {
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fsl,pins = <
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MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK 0x5
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MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 0x5
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MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 0x5
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MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 0x5
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MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 0x5
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MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 0x5
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MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 0x5
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MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 0x5
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MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 0x5
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MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 0x5
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MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6 0x5
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MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7 0x5
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MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8 0x5
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MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9 0x5
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MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10 0x5
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MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11 0x5
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MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12 0x5
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MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13 0x5
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MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14 0x5
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MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15 0x5
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MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16 0x5
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MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17 0x5
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MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18 0x5
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MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19 0x5
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MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20 0x5
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MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21 0x5
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MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22 0x5
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MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23 0x5
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>;
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};
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pinctrl_tsc2007: tsc2007grp {
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fsl,pins = <
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MX53_PAD_EIM_D26__GPIO3_26 0x1f0 /* Interrupt */
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>;
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};
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};
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};
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&ipu_di0_disp0 {
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remote-endpoint = <&display0_in>;
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};
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&kpp {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_kpp>;
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/* sample keymap */
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/* row/col 0,1 are mapped to KPP row/col 6,7 */
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linux,keymap = <
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MATRIX_KEY(6, 6, KEY_POWER)
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MATRIX_KEY(6, 7, KEY_KP0)
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MATRIX_KEY(6, 2, KEY_KP1)
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MATRIX_KEY(6, 3, KEY_KP2)
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MATRIX_KEY(7, 6, KEY_KP3)
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MATRIX_KEY(7, 7, KEY_KP4)
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MATRIX_KEY(7, 2, KEY_KP5)
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MATRIX_KEY(7, 3, KEY_KP6)
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MATRIX_KEY(2, 6, KEY_KP7)
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MATRIX_KEY(2, 7, KEY_KP8)
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MATRIX_KEY(2, 2, KEY_KP9)
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>;
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status = "okay";
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};
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