mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-15 20:26:48 +07:00
4c48e549f3
The imx SC api strongly assumes that messages are composed out of
4-bytes words but some of our message structs have odd sizeofs.
This produces many oopses with CONFIG_KASAN=y.
Fix by marking with __aligned(4).
Fixes: b96eea718b ("pinctrl: fsl: add scu based pinctrl support")
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Link: https://lore.kernel.org/r/bd7ad5fd755739a6d8d5f4f65e03b3ca4f457bd2.1582216144.git.leonard.crestez@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
122 lines
2.7 KiB
C
122 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2016 Freescale Semiconductor, Inc.
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* Copyright 2017-2018 NXP
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* Dong Aisheng <aisheng.dong@nxp.com>
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*/
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#include <linux/err.h>
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#include <linux/firmware/imx/sci.h>
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#include <linux/of_address.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/platform_device.h>
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#include "../core.h"
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#include "pinctrl-imx.h"
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enum pad_func_e {
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IMX_SC_PAD_FUNC_SET = 15,
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IMX_SC_PAD_FUNC_GET = 16,
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};
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struct imx_sc_msg_req_pad_set {
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struct imx_sc_rpc_msg hdr;
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u32 val;
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u16 pad;
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} __packed __aligned(4);
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struct imx_sc_msg_req_pad_get {
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struct imx_sc_rpc_msg hdr;
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u16 pad;
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} __packed __aligned(4);
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struct imx_sc_msg_resp_pad_get {
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struct imx_sc_rpc_msg hdr;
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u32 val;
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} __packed;
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static struct imx_sc_ipc *pinctrl_ipc_handle;
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int imx_pinctrl_sc_ipc_init(struct platform_device *pdev)
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{
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return imx_scu_get_handle(&pinctrl_ipc_handle);
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}
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int imx_pinconf_get_scu(struct pinctrl_dev *pctldev, unsigned pin_id,
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unsigned long *config)
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{
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struct imx_sc_msg_req_pad_get msg;
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struct imx_sc_msg_resp_pad_get *resp;
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struct imx_sc_rpc_msg *hdr = &msg.hdr;
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int ret;
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hdr->ver = IMX_SC_RPC_VERSION;
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hdr->svc = IMX_SC_RPC_SVC_PAD;
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hdr->func = IMX_SC_PAD_FUNC_GET;
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hdr->size = 2;
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msg.pad = pin_id;
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ret = imx_scu_call_rpc(pinctrl_ipc_handle, &msg, true);
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if (ret)
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return ret;
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resp = (struct imx_sc_msg_resp_pad_get *)&msg;
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*config = resp->val;
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return 0;
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}
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int imx_pinconf_set_scu(struct pinctrl_dev *pctldev, unsigned pin_id,
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unsigned long *configs, unsigned num_configs)
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{
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struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
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struct imx_sc_msg_req_pad_set msg;
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struct imx_sc_rpc_msg *hdr = &msg.hdr;
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unsigned int mux = configs[0];
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unsigned int conf = configs[1];
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unsigned int val;
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int ret;
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/*
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* Set mux and conf together in one IPC call
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*/
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WARN_ON(num_configs != 2);
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val = conf | BM_PAD_CTL_IFMUX_ENABLE | BM_PAD_CTL_GP_ENABLE;
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val |= mux << BP_PAD_CTL_IFMUX;
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hdr->ver = IMX_SC_RPC_VERSION;
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hdr->svc = IMX_SC_RPC_SVC_PAD;
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hdr->func = IMX_SC_PAD_FUNC_SET;
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hdr->size = 3;
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msg.pad = pin_id;
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msg.val = val;
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ret = imx_scu_call_rpc(pinctrl_ipc_handle, &msg, true);
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dev_dbg(ipctl->dev, "write: pin_id %u config 0x%x val 0x%x\n",
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pin_id, conf, val);
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return ret;
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}
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void imx_pinctrl_parse_pin_scu(struct imx_pinctrl *ipctl,
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unsigned int *pin_id, struct imx_pin *pin,
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const __be32 **list_p)
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{
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const struct imx_pinctrl_soc_info *info = ipctl->info;
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struct imx_pin_scu *pin_scu = &pin->conf.scu;
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const __be32 *list = *list_p;
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pin->pin = be32_to_cpu(*list++);
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*pin_id = pin->pin;
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pin_scu->mux_mode = be32_to_cpu(*list++);
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pin_scu->config = be32_to_cpu(*list++);
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*list_p = list;
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dev_dbg(ipctl->dev, "%s: 0x%x 0x%08lx", info->pins[pin->pin].name,
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pin_scu->mux_mode, pin_scu->config);
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}
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