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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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45d59d7040
Add new driver for the MXSFB controller found in i.MX23/28/6SX . The MXSFB controller is a simple framebuffer controller with one parallel LCD output. Unlike the MXSFB fbdev driver that is used on these systems now, this driver uses the DRM/KMS framework. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org>
115 lines
4.0 KiB
C
115 lines
4.0 KiB
C
/*
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* Copyright (C) 2010 Juergen Beisert, Pengutronix
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* Copyright (C) 2016 Marek Vasut <marex@denx.de>
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*
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* i.MX23/i.MX28/i.MX6SX MXSFB LCD controller driver.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __MXSFB_REGS_H__
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#define __MXSFB_REGS_H__
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#define REG_SET 4
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#define REG_CLR 8
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#define LCDC_CTRL 0x00
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#define LCDC_CTRL1 0x10
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#define LCDC_V3_TRANSFER_COUNT 0x20
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#define LCDC_V4_TRANSFER_COUNT 0x30
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#define LCDC_V4_CUR_BUF 0x40
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#define LCDC_V4_NEXT_BUF 0x50
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#define LCDC_V3_CUR_BUF 0x30
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#define LCDC_V3_NEXT_BUF 0x40
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#define LCDC_VDCTRL0 0x70
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#define LCDC_VDCTRL1 0x80
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#define LCDC_VDCTRL2 0x90
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#define LCDC_VDCTRL3 0xa0
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#define LCDC_VDCTRL4 0xb0
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#define LCDC_V4_DEBUG0 0x1d0
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#define LCDC_V3_DEBUG0 0x1f0
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#define CTRL_SFTRST (1 << 31)
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#define CTRL_CLKGATE (1 << 30)
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#define CTRL_BYPASS_COUNT (1 << 19)
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#define CTRL_VSYNC_MODE (1 << 18)
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#define CTRL_DOTCLK_MODE (1 << 17)
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#define CTRL_DATA_SELECT (1 << 16)
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#define CTRL_SET_BUS_WIDTH(x) (((x) & 0x3) << 10)
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#define CTRL_GET_BUS_WIDTH(x) (((x) >> 10) & 0x3)
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#define CTRL_SET_WORD_LENGTH(x) (((x) & 0x3) << 8)
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#define CTRL_GET_WORD_LENGTH(x) (((x) >> 8) & 0x3)
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#define CTRL_MASTER (1 << 5)
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#define CTRL_DF16 (1 << 3)
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#define CTRL_DF18 (1 << 2)
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#define CTRL_DF24 (1 << 1)
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#define CTRL_RUN (1 << 0)
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#define CTRL1_FIFO_CLEAR (1 << 21)
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#define CTRL1_SET_BYTE_PACKAGING(x) (((x) & 0xf) << 16)
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#define CTRL1_GET_BYTE_PACKAGING(x) (((x) >> 16) & 0xf)
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#define CTRL1_CUR_FRAME_DONE_IRQ_EN (1 << 13)
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#define CTRL1_CUR_FRAME_DONE_IRQ (1 << 9)
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#define TRANSFER_COUNT_SET_VCOUNT(x) (((x) & 0xffff) << 16)
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#define TRANSFER_COUNT_GET_VCOUNT(x) (((x) >> 16) & 0xffff)
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#define TRANSFER_COUNT_SET_HCOUNT(x) ((x) & 0xffff)
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#define TRANSFER_COUNT_GET_HCOUNT(x) ((x) & 0xffff)
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#define VDCTRL0_ENABLE_PRESENT (1 << 28)
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#define VDCTRL0_VSYNC_ACT_HIGH (1 << 27)
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#define VDCTRL0_HSYNC_ACT_HIGH (1 << 26)
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#define VDCTRL0_DOTCLK_ACT_FALLING (1 << 25)
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#define VDCTRL0_ENABLE_ACT_HIGH (1 << 24)
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#define VDCTRL0_VSYNC_PERIOD_UNIT (1 << 21)
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#define VDCTRL0_VSYNC_PULSE_WIDTH_UNIT (1 << 20)
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#define VDCTRL0_HALF_LINE (1 << 19)
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#define VDCTRL0_HALF_LINE_MODE (1 << 18)
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#define VDCTRL0_SET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff)
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#define VDCTRL0_GET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff)
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#define VDCTRL2_SET_HSYNC_PERIOD(x) ((x) & 0x3ffff)
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#define VDCTRL2_GET_HSYNC_PERIOD(x) ((x) & 0x3ffff)
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#define VDCTRL3_MUX_SYNC_SIGNALS (1 << 29)
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#define VDCTRL3_VSYNC_ONLY (1 << 28)
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#define SET_HOR_WAIT_CNT(x) (((x) & 0xfff) << 16)
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#define GET_HOR_WAIT_CNT(x) (((x) >> 16) & 0xfff)
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#define SET_VERT_WAIT_CNT(x) ((x) & 0xffff)
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#define GET_VERT_WAIT_CNT(x) ((x) & 0xffff)
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#define VDCTRL4_SET_DOTCLK_DLY(x) (((x) & 0x7) << 29) /* v4 only */
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#define VDCTRL4_GET_DOTCLK_DLY(x) (((x) >> 29) & 0x7) /* v4 only */
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#define VDCTRL4_SYNC_SIGNALS_ON (1 << 18)
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#define SET_DOTCLK_H_VALID_DATA_CNT(x) ((x) & 0x3ffff)
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#define DEBUG0_HSYNC (1 < 26)
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#define DEBUG0_VSYNC (1 < 25)
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#define MXSFB_MIN_XRES 120
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#define MXSFB_MIN_YRES 120
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#define MXSFB_MAX_XRES 0xffff
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#define MXSFB_MAX_YRES 0xffff
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#define RED 0
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#define GREEN 1
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#define BLUE 2
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#define TRANSP 3
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#define STMLCDIF_8BIT 1 /* pixel data bus to the display is of 8 bit width */
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#define STMLCDIF_16BIT 0 /* pixel data bus to the display is of 16 bit width */
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#define STMLCDIF_18BIT 2 /* pixel data bus to the display is of 18 bit width */
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#define STMLCDIF_24BIT 3 /* pixel data bus to the display is of 24 bit width */
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#define MXSFB_SYNC_DATA_ENABLE_HIGH_ACT (1 << 6)
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#define MXSFB_SYNC_DOTCLK_FALLING_ACT (1 << 7) /* negative edge sampling */
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#endif /* __MXSFB_REGS_H__ */
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