mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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a09e64fbc0
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
135 lines
2.5 KiB
C
135 lines
2.5 KiB
C
/*
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* linux/arch/arm/mach-sa1100/clock.c
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/list.h>
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/string.h>
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#include <linux/clk.h>
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#include <linux/spinlock.h>
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#include <linux/mutex.h>
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#include <mach/hardware.h>
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/*
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* Very simple clock implementation - we only have one clock to
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* deal with at the moment, so we only match using the "name".
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*/
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struct clk {
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struct list_head node;
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unsigned long rate;
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const char *name;
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unsigned int enabled;
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void (*enable)(void);
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void (*disable)(void);
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};
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static LIST_HEAD(clocks);
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static DEFINE_MUTEX(clocks_mutex);
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static DEFINE_SPINLOCK(clocks_lock);
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struct clk *clk_get(struct device *dev, const char *id)
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{
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struct clk *p, *clk = ERR_PTR(-ENOENT);
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mutex_lock(&clocks_mutex);
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list_for_each_entry(p, &clocks, node) {
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if (strcmp(id, p->name) == 0) {
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clk = p;
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break;
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}
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}
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mutex_unlock(&clocks_mutex);
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return clk;
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}
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EXPORT_SYMBOL(clk_get);
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void clk_put(struct clk *clk)
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{
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}
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EXPORT_SYMBOL(clk_put);
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int clk_enable(struct clk *clk)
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{
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unsigned long flags;
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spin_lock_irqsave(&clocks_lock, flags);
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if (clk->enabled++ == 0)
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clk->enable();
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spin_unlock_irqrestore(&clocks_lock, flags);
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return 0;
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}
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EXPORT_SYMBOL(clk_enable);
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void clk_disable(struct clk *clk)
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{
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unsigned long flags;
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WARN_ON(clk->enabled == 0);
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spin_lock_irqsave(&clocks_lock, flags);
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if (--clk->enabled == 0)
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clk->disable();
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spin_unlock_irqrestore(&clocks_lock, flags);
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}
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EXPORT_SYMBOL(clk_disable);
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unsigned long clk_get_rate(struct clk *clk)
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{
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return clk->rate;
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}
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EXPORT_SYMBOL(clk_get_rate);
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static void clk_gpio27_enable(void)
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{
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/*
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* First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
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* (SA-1110 Developer's Manual, section 9.1.2.1)
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*/
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GAFR |= GPIO_32_768kHz;
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GPDR |= GPIO_32_768kHz;
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TUCR = TUCR_3_6864MHz;
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}
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static void clk_gpio27_disable(void)
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{
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TUCR = 0;
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GPDR &= ~GPIO_32_768kHz;
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GAFR &= ~GPIO_32_768kHz;
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}
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static struct clk clk_gpio27 = {
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.name = "SA1111_CLK",
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.rate = 3686400,
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.enable = clk_gpio27_enable,
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.disable = clk_gpio27_disable,
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};
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int clk_register(struct clk *clk)
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{
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mutex_lock(&clocks_mutex);
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list_add(&clk->node, &clocks);
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mutex_unlock(&clocks_mutex);
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return 0;
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}
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EXPORT_SYMBOL(clk_register);
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void clk_unregister(struct clk *clk)
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{
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mutex_lock(&clocks_mutex);
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list_del(&clk->node);
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mutex_unlock(&clocks_mutex);
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}
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EXPORT_SYMBOL(clk_unregister);
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static int __init clk_init(void)
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{
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clk_register(&clk_gpio27);
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return 0;
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}
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arch_initcall(clk_init);
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