mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-16 01:56:57 +07:00
27df89689e
Both spin locks and write locks currently do: f0 0f b1 17 lock cmpxchg %edx,(%rdi) 85 c0 test %eax,%eax 75 05 jne [slowpath] This 'test' insn is superfluous; the cmpxchg insn sets the Z flag appropriately. Peter pointed out that using atomic_try_cmpxchg_acquire() will let the compiler know this is true. Comparing before/after disassemblies show the only effect is to remove this insn. Take this opportunity to make the spin & write lock code resemble each other more closely and have similar likely() hints. Suggested-by: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Matthew Wilcox <willy@infradead.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Will Deacon <will.deacon@arm.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Waiman Long <longman@redhat.com> Link: http://lkml.kernel.org/r/20180820162639.GC25153@bombadil.infradead.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
140 lines
3.8 KiB
C
140 lines
3.8 KiB
C
/*
|
|
* Queue read/write lock
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License as published by
|
|
* the Free Software Foundation; either version 2 of the License, or
|
|
* (at your option) any later version.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* (C) Copyright 2013-2014 Hewlett-Packard Development Company, L.P.
|
|
*
|
|
* Authors: Waiman Long <waiman.long@hp.com>
|
|
*/
|
|
#ifndef __ASM_GENERIC_QRWLOCK_H
|
|
#define __ASM_GENERIC_QRWLOCK_H
|
|
|
|
#include <linux/atomic.h>
|
|
#include <asm/barrier.h>
|
|
#include <asm/processor.h>
|
|
|
|
#include <asm-generic/qrwlock_types.h>
|
|
|
|
/*
|
|
* Writer states & reader shift and bias.
|
|
*/
|
|
#define _QW_WAITING 0x100 /* A writer is waiting */
|
|
#define _QW_LOCKED 0x0ff /* A writer holds the lock */
|
|
#define _QW_WMASK 0x1ff /* Writer mask */
|
|
#define _QR_SHIFT 9 /* Reader count shift */
|
|
#define _QR_BIAS (1U << _QR_SHIFT)
|
|
|
|
/*
|
|
* External function declarations
|
|
*/
|
|
extern void queued_read_lock_slowpath(struct qrwlock *lock);
|
|
extern void queued_write_lock_slowpath(struct qrwlock *lock);
|
|
|
|
/**
|
|
* queued_read_trylock - try to acquire read lock of a queue rwlock
|
|
* @lock : Pointer to queue rwlock structure
|
|
* Return: 1 if lock acquired, 0 if failed
|
|
*/
|
|
static inline int queued_read_trylock(struct qrwlock *lock)
|
|
{
|
|
u32 cnts;
|
|
|
|
cnts = atomic_read(&lock->cnts);
|
|
if (likely(!(cnts & _QW_WMASK))) {
|
|
cnts = (u32)atomic_add_return_acquire(_QR_BIAS, &lock->cnts);
|
|
if (likely(!(cnts & _QW_WMASK)))
|
|
return 1;
|
|
atomic_sub(_QR_BIAS, &lock->cnts);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* queued_write_trylock - try to acquire write lock of a queue rwlock
|
|
* @lock : Pointer to queue rwlock structure
|
|
* Return: 1 if lock acquired, 0 if failed
|
|
*/
|
|
static inline int queued_write_trylock(struct qrwlock *lock)
|
|
{
|
|
u32 cnts;
|
|
|
|
cnts = atomic_read(&lock->cnts);
|
|
if (unlikely(cnts))
|
|
return 0;
|
|
|
|
return likely(atomic_try_cmpxchg_acquire(&lock->cnts, &cnts,
|
|
_QW_LOCKED));
|
|
}
|
|
/**
|
|
* queued_read_lock - acquire read lock of a queue rwlock
|
|
* @lock: Pointer to queue rwlock structure
|
|
*/
|
|
static inline void queued_read_lock(struct qrwlock *lock)
|
|
{
|
|
u32 cnts;
|
|
|
|
cnts = atomic_add_return_acquire(_QR_BIAS, &lock->cnts);
|
|
if (likely(!(cnts & _QW_WMASK)))
|
|
return;
|
|
|
|
/* The slowpath will decrement the reader count, if necessary. */
|
|
queued_read_lock_slowpath(lock);
|
|
}
|
|
|
|
/**
|
|
* queued_write_lock - acquire write lock of a queue rwlock
|
|
* @lock : Pointer to queue rwlock structure
|
|
*/
|
|
static inline void queued_write_lock(struct qrwlock *lock)
|
|
{
|
|
u32 cnts = 0;
|
|
/* Optimize for the unfair lock case where the fair flag is 0. */
|
|
if (likely(atomic_try_cmpxchg_acquire(&lock->cnts, &cnts, _QW_LOCKED)))
|
|
return;
|
|
|
|
queued_write_lock_slowpath(lock);
|
|
}
|
|
|
|
/**
|
|
* queued_read_unlock - release read lock of a queue rwlock
|
|
* @lock : Pointer to queue rwlock structure
|
|
*/
|
|
static inline void queued_read_unlock(struct qrwlock *lock)
|
|
{
|
|
/*
|
|
* Atomically decrement the reader count
|
|
*/
|
|
(void)atomic_sub_return_release(_QR_BIAS, &lock->cnts);
|
|
}
|
|
|
|
/**
|
|
* queued_write_unlock - release write lock of a queue rwlock
|
|
* @lock : Pointer to queue rwlock structure
|
|
*/
|
|
static inline void queued_write_unlock(struct qrwlock *lock)
|
|
{
|
|
smp_store_release(&lock->wlocked, 0);
|
|
}
|
|
|
|
/*
|
|
* Remapping rwlock architecture specific functions to the corresponding
|
|
* queue rwlock functions.
|
|
*/
|
|
#define arch_read_lock(l) queued_read_lock(l)
|
|
#define arch_write_lock(l) queued_write_lock(l)
|
|
#define arch_read_trylock(l) queued_read_trylock(l)
|
|
#define arch_write_trylock(l) queued_write_trylock(l)
|
|
#define arch_read_unlock(l) queued_read_unlock(l)
|
|
#define arch_write_unlock(l) queued_write_unlock(l)
|
|
|
|
#endif /* __ASM_GENERIC_QRWLOCK_H */
|