mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-03 10:16:42 +07:00
cfc319833b
Impact: micro-optimize the 32-bit TLB flush code
Use the faster x86_{read,write}_percpu() accessors here.
Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
56 lines
1.4 KiB
C
56 lines
1.4 KiB
C
#ifndef _ASM_X86_MMU_CONTEXT_32_H
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#define _ASM_X86_MMU_CONTEXT_32_H
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static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
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{
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#ifdef CONFIG_SMP
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if (x86_read_percpu(cpu_tlbstate.state) == TLBSTATE_OK)
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x86_write_percpu(cpu_tlbstate.state, TLBSTATE_LAZY);
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#endif
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}
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static inline void switch_mm(struct mm_struct *prev,
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struct mm_struct *next,
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struct task_struct *tsk)
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{
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int cpu = smp_processor_id();
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if (likely(prev != next)) {
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/* stop flush ipis for the previous mm */
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cpu_clear(cpu, prev->cpu_vm_mask);
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#ifdef CONFIG_SMP
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x86_write_percpu(cpu_tlbstate.state, TLBSTATE_OK);
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x86_write_percpu(cpu_tlbstate.active_mm, next);
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#endif
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cpu_set(cpu, next->cpu_vm_mask);
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/* Re-load page tables */
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load_cr3(next->pgd);
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/*
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* load the LDT, if the LDT is different:
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*/
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if (unlikely(prev->context.ldt != next->context.ldt))
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load_LDT_nolock(&next->context);
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}
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#ifdef CONFIG_SMP
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else {
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x86_write_percpu(cpu_tlbstate.state, TLBSTATE_OK);
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BUG_ON(x86_read_percpu(cpu_tlbstate.active_mm) != next);
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if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
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/* We were in lazy tlb mode and leave_mm disabled
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* tlb flush IPI delivery. We must reload %cr3.
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*/
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load_cr3(next->pgd);
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load_LDT_nolock(&next->context);
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}
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}
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#endif
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}
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#define deactivate_mm(tsk, mm) \
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asm("movl %0,%%gs": :"r" (0));
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#endif /* _ASM_X86_MMU_CONTEXT_32_H */
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