Martin Blumenstingl bb6eddd1d2 clk: meson: meson8b: use the HHI syscon if available ... The clock controller is located in a register range (called "HHI") which contains more than just registers for the clock controller. Known consumers of the HHI register range are: - the clock controller - a reset controller - temperature sensor calibration coefficient (TSC) (only on Meson8b and Meson8m2) - HDMI controller The main reason for using a syscon is the "temperature sensor calibration coefficient" which has to be set for the built-in temperature sensor to work correctly. Four TSC bits are located in the SAR ADC's register space. However on Meson8b and Meson8m2 there is a fifth TSC bit which is unfortunately located in the HHI register space. To be more precise, bit 9 of the HHI_DPLL_TOP_0 register (which sits right between the HHI_SYS_PLL and HHI_VID_PLL registers). Get the regmap from the parent (HHI syscon) node to support all functionality of the HHI register range. Backwards compatibility with old .dtbs is ensured by falling back to parsing the registers just like before this change. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lkml.kernel.org/r/20181028120859.5735-3-martin.blumenstingl@googlemail.com		2018-11-23 15:11:56 +01:00
..
actions	clk: actions: Add Actions Semi S900 SoC Reset Management Unit support	2018-10-16 14:41:53 -07:00
at91	Merge branches 'clk-actions-reset', 'clk-imx7-init-critical', 'clk-mmp2-ids' and 'clk-at91-pmc-rework' into clk-next	2018-10-18 15:43:48 -07:00
axis
axs10x	clk: Convert to using %pOFn instead of device_node.name	2018-08-30 09:50:20 -07:00
bcm	clk: Convert to using %pOFn instead of device_node.name	2018-08-30 09:50:20 -07:00
berlin	This time we have a good set of changes to the core framework that do some	2018-06-09 12:06:24 -07:00
davinci	clk: davinci: kill davinci_clk_reset_assert/deassert()	2018-10-02 08:54:14 -07:00
h8300	clk: h8300: pr_err() strings should end with newlines	2017-12-06 22:40:02 -08:00
hisilicon	Merge branches 'clk-samsung', 'clk-hisi3670' and 'clk-at91-div-0' into clk-next	2018-10-18 15:41:36 -07:00
imgtec	Update MIPS email addresses	2017-11-03 09:02:30 -07:00
imx	Merge branches 'clk-imx6-mmdc', 'clk-qcom-krait', 'clk-rockchip' and 'clk-smp2s11-match' into clk-next	2018-10-18 15:44:01 -07:00
ingenic	clk: Add Ingenic jz4725b CGU driver	2018-10-16 15:19:48 -07:00
keystone	Merge branch 'clk-k3-tisci' into clk-next	2018-10-18 15:40:10 -07:00
loongson1
mediatek	clk: mediatek: remove unused array audio_parents	2018-08-30 18:29:36 -07:00
meson	clk: meson: meson8b: use the HHI syscon if available	2018-11-23 15:11:56 +01:00
microchip
mmp	clk: mmp2: fix the clock id for sdh2_clk and sdh3_clk	2018-10-17 09:02:31 -07:00
mvebu	This time it looks like a quieter release cycle in the clk tree. I guess that's	2018-10-31 11:08:30 -07:00
mxs	clk: mxs: make clk_ops const	2017-11-01 23:25:43 -07:00
nxp	clk: lpc32xx: Set name of regmap_config	2018-03-19 14:35:16 -07:00
pistachio
pxa	clk: pxa: export 32kHz PLL	2018-07-06 13:52:57 -07:00
qcom	Merge branches 'clk-fixed-rate-remove' and 'clk-qcom-cleanup' into clk-next	2018-10-18 15:44:13 -07:00
renesas	Merge branch 'clk-renesas' into clk-next	2018-10-18 15:38:51 -07:00
rockchip	clk: rockchip: Fix static checker warning in rockchip_ddrclk_get_parent call	2018-10-17 15:12:51 +02:00
samsung	clk: samsung: Use clk_hw API for calling clk framework from clk notifiers	2018-10-05 13:36:39 +02:00
sirf	We have two changes to the core framework this time around. The first being a	2017-11-17 20:04:24 -08:00
socfpga	clk: socfpga: stratix10: fix the sdmmc_free_clk mux	2018-07-06 11:08:02 -07:00
spear	clk: spear: fix WDT clock definition on SPEAr600	2018-04-06 13:45:34 -07:00
sprd	clk: sprd: add RTC gate for SC9860	2018-03-16 15:53:30 -07:00
st	clk: Convert to using %pOFn instead of device_node.name	2018-08-30 09:50:20 -07:00
sunxi	clk: Convert to using %pOFn instead of device_node.name	2018-08-30 09:50:20 -07:00
sunxi-ng	This time it looks like a quieter release cycle in the clk tree. I guess that's	2018-10-31 11:08:30 -07:00
tegra	clk: tegra210: Include size.h for compilation ease	2018-10-16 15:33:01 -07:00
ti	This time it looks like a quieter release cycle in the clk tree. I guess that's	2018-10-31 11:08:30 -07:00
uniphier	clk: uniphier: add clock frequency support for SPI	2018-07-25 16:26:18 -07:00
ux500	clk: ux500: Drop AB8540/9540 support	2018-03-23 09:36:11 -07:00
versatile	clk: versatile: Remove WARNs in ->round_rate()	2018-03-16 15:31:16 -07:00
x86	clk: x86: Stop marking clocks as CLK_IS_CRITICAL	2018-09-17 18:47:58 -07:00
zte	clk: move clock common macros out from vendor directories	2017-12-21 15:00:38 -08:00
zynq	clk: Convert to using %pOFn instead of device_node.name	2018-08-30 09:50:20 -07:00
zynqmp	drivers: clk: Add ZynqMP clock driver	2018-10-09 13:29:19 +02:00
clk-asm9260.c	clk: Convert to using %pOFn instead of device_node.name	2018-08-30 09:50:20 -07:00
clk-aspeed.c	The new and exciting feature this time around is in the clk core.	2018-08-15 21:41:21 -07:00
clk-axi-clkgen.c	clk: axi-clkgen: Round closest in round_rate() and recalc_rate()	2017-12-21 18:07:53 -08:00
clk-axm5516.c
clk-bulk.c	clk: add new APIs to operate on all available clocks	2018-10-16 15:42:48 -07:00
clk-cdce706.c
clk-cdce925.c	Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next	2018-10-18 15:33:52 -07:00
clk-clps711x.c	treewide: Use struct_size() for kmalloc()-family	2018-06-06 11:15:43 -07:00
clk-composite.c
clk-conf.c	clk: Convert to using %pOF instead of full_name	2017-07-21 15:49:54 -07:00
clk-cs2000-cp.c	clk: cs2000-cp: convert to SPDX identifiers	2018-08-02 13:55:00 -07:00
clk-devres.c	clk: add managed version of clk_bulk_get_all	2018-10-16 15:42:49 -07:00
clk-divider.c	clk: divider: read-only divider can propagate rate change	2018-03-12 15:10:26 -07:00
clk-efm32gg.c	treewide: Use struct_size() for kmalloc()-family	2018-06-06 11:15:43 -07:00
clk-fixed-factor.c	clk: Convert to using %pOFn instead of device_node.name	2018-08-30 09:50:20 -07:00
clk-fixed-rate.c	clk: fixed-rate: fix of_node_get-put imbalance	2018-10-18 13:40:15 -07:00
clk-fractional-divider.c	clk: fractional-divider: allow overriding of approximation	2017-08-08 17:39:48 +02:00
clk-gate.c	clk: gate: expose clk_gate_ops::is_enabled	2017-08-31 18:35:45 -07:00
clk-gemini.c	treewide: Use struct_size() for kmalloc()-family	2018-06-06 11:15:43 -07:00
clk-gpio.c	clk: Convert to using %pOFn instead of device_node.name	2018-08-30 09:50:20 -07:00
clk-hi655x.c	clk: hi6220: Add the hi655x's pmic clock	2017-04-21 19:18:53 -07:00
clk-highbank.c
clk-hsdk-pll.c	clk: Convert to using %pOFn instead of device_node.name	2018-08-30 09:50:20 -07:00
clk-max9485.c	clk: Add driver for MAX9485	2018-07-06 13:44:06 -07:00
clk-max77686.c	clk: max77686: Add SPDX license identifiers	2018-08-27 14:16:51 -07:00
clk-moxart.c	clk: Convert to using %pOF instead of full_name	2017-07-21 15:49:54 -07:00
clk-multiplier.c
clk-mux.c	clk: honor CLK_MUX_ROUND_CLOSEST in generic clk mux	2018-04-16 09:25:07 -07:00
clk-nomadik.c	clk: Convert to using %pOFn instead of device_node.name	2018-08-30 09:50:20 -07:00
clk-npcm7xx.c	This time it looks like a quieter release cycle in the clk tree. I guess that's	2018-10-31 11:08:30 -07:00
clk-nspire.c
clk-oxnas.c
clk-palmas.c	clk: Convert to using %pOFn instead of device_node.name	2018-08-30 09:50:20 -07:00
clk-pwm.c
clk-qoriq.c	clk: Convert to using %pOFn instead of device_node.name	2018-08-30 09:50:20 -07:00
clk-rk808.c
clk-s2mps11.c	Merge branches 'clk-imx6-mmdc', 'clk-qcom-krait', 'clk-rockchip' and 'clk-smp2s11-match' into clk-next	2018-10-18 15:44:01 -07:00
clk-scmi.c	clk: Convert to using %pOFn instead of device_node.name	2018-08-30 09:50:20 -07:00
clk-scpi.c	clk: Convert to using %pOFn instead of device_node.name	2018-08-30 09:50:20 -07:00
clk-si514.c	clk-si514, clk-si544: Implement prepare/unprepare/is_prepared operations	2018-06-29 10:59:40 -07:00
clk-si544.c	clk-si514, clk-si544: Implement prepare/unprepare/is_prepared operations	2018-06-29 10:59:40 -07:00
clk-si570.c
clk-si5351.c	clk: Convert to using %pOFn instead of device_node.name	2018-08-30 09:50:20 -07:00
clk-si5351.h
clk-stm32f4.c	clk: Convert to using %pOFn instead of device_node.name	2018-08-30 09:50:20 -07:00
clk-stm32h7.c	clk: Convert to using %pOFn instead of device_node.name	2018-08-30 09:50:20 -07:00
clk-stm32mp1.c	clk: Convert to using %pOFn instead of device_node.name	2018-08-30 09:50:20 -07:00
clk-tango4.c	clk: Convert to using %pOFn instead of device_node.name	2018-08-30 09:50:20 -07:00
clk-twl6040.c	clk: make clk_init_data const	2017-11-01 23:25:51 -07:00
clk-u300.c	clk: clk-u300: Fix a typo in two comment lines	2017-11-13 17:39:43 -08:00
clk-versaclock5.c	clk: vc5: Add support for IDT VersaClock 5P49V5925	2017-07-17 11:51:00 -07:00
clk-vt8500.c
clk-wm831x.c	clk: make clk_init_data const	2017-11-01 23:25:51 -07:00
clk-xgene.c	clk: clk-xgene: Adjust six checks for null pointers	2017-11-13 17:40:03 -08:00
clk.c	clk: Clean up suspend/resume coding style	2018-10-11 09:28:13 -07:00
clk.h	clk: Move __clk_{get,put}() into private clk.h API	2018-01-04 15:13:29 -08:00
clkdev.c	ARM: 8778/1: clkdev: don't call __of_clk_get_by_name() unnecessarily from clk_get()	2018-08-13 16:27:52 +01:00
Kconfig	This time it looks like a quieter release cycle in the clk tree. I guess that's	2018-10-31 11:08:30 -07:00
Makefile	This time it looks like a quieter release cycle in the clk tree. I guess that's	2018-10-31 11:08:30 -07:00