Nickey Yang bb4e6ff01a arm64: dts: rockchip: Correct MIPI DPHY PLL clock on rk3399 ... There is a further gate in between the mipidphy reference clock and the actual ref-clock input to the dsi host, making the clock hirarchy look like clk_24m --> Gate11[14] --> clk_mipidphy_ref --> Gate21[0] --> clk_dphy_pll Fix the clock reference so that the whole clock subtree gets enabled when the dsi host needs it. Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com> [amended commit message] Signed-off-by: Heiko Stuebner <heiko@sntech.de>		2017-09-19 19:25:10 +02:00
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dts	arm64: dts: rockchip: Correct MIPI DPHY PLL clock on rk3399	2017-09-19 19:25:10 +02:00
.gitignore	arm64: Build infrastructure	2012-09-17 13:42:21 +01:00
install.sh	arm64: kbuild: make "make install" not depend on vmlinux	2016-02-19 10:33:35 +00:00
Makefile	arm64: localise Image objcopy flags	2016-07-19 15:30:23 +01:00