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This patch adds support for making one power domain a sub-domain of other domain. This is useful for modeling power dependences for devices like TV Mixer or Camera ISP, which needs to have more than one power domain enabled to be operational. Based on previous work by Amit Daniel Kachhap <amit.daniel@samsung.com>. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Kukjin Kim <kgene@kernel.org>
50 lines
1.8 KiB
Plaintext
50 lines
1.8 KiB
Plaintext
* Samsung Exynos Power Domains
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Exynos processors include support for multiple power domains which are used
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to gate power to one or more peripherals on the processor.
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Required Properties:
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- compatible: should be one of the following.
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* samsung,exynos4210-pd - for exynos4210 type power domain.
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- reg: physical base address of the controller and length of memory mapped
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region.
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- #power-domain-cells: number of cells in power domain specifier;
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must be 0.
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Optional Properties:
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- clocks: List of clock handles. The parent clocks of the input clocks to the
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devices in this power domain are set to oscclk before power gating
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and restored back after powering on a domain. This is required for
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all domains which are powered on and off and not required for unused
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domains.
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- clock-names: The following clocks can be specified:
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- oscclk: Oscillator clock.
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- pclkN, clkN: Pairs of parent of input clock and input clock to the
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devices in this power domain. Maximum of 4 pairs (N = 0 to 3)
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are supported currently.
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- power-domains: phandle pointing to the parent power domain, for more details
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see Documentation/devicetree/bindings/power/power_domain.txt
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Node of a device using power domains must have a power-domains property
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defined with a phandle to respective power domain.
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Example:
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lcd0: power-domain-lcd0 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10023C00 0x10>;
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#power-domain-cells = <0>;
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};
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mfc_pd: power-domain@10044060 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10044060 0x20>;
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clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_SW_ACLK333>,
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<&clock CLK_MOUT_USER_ACLK333>;
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clock-names = "oscclk", "pclk0", "clk0";
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#power-domain-cells = <0>;
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};
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See Documentation/devicetree/bindings/power/power_domain.txt for description
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of consumer-side bindings.
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