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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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a6b2029796
Commitacdc0d5ef9
('m32r: fix breakage from "m32r: use generic ptrace_resume code"') tried to fix a problem in commite34112e396
("m32r: use generic ptrace_resume code") by returning values in a function returning void, causing: arch/m32r/kernel/ptrace.c: In function 'user_enable_single_step': arch/m32r/kernel/ptrace.c:594:3: warning: 'return' with a value, in function returning void [enabled by default] arch/m32r/kernel/ptrace.c:598:3: warning: 'return' with a value, in function returning void [enabled by default] arch/m32r/kernel/ptrace.c:601:3: warning: 'return' with a value, in function returning void [enabled by default] arch/m32r/kernel/ptrace.c:604:2: warning: 'return' with a value, in function returning void [enabled by default] Remove the unneeded return values. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Al Viro <viro@zeniv.linux.org.uk> Cc: Christoph Hellwig <hch@lst.de> Cc: Hirokazu Takata <takata@linux-m32r.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
702 lines
15 KiB
C
702 lines
15 KiB
C
/*
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* linux/arch/m32r/kernel/ptrace.c
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*
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* Copyright (C) 2002 Hirokazu Takata, Takeo Takahashi
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* Copyright (C) 2004 Hirokazu Takata, Kei Sakamoto
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*
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* Original x86 implementation:
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* By Ross Biro 1/23/92
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* edited by Linus Torvalds
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*
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* Some code taken from sh version:
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* Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka
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* Some code taken from arm version:
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* Copyright (C) 2000 Russell King
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*/
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/mm.h>
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#include <linux/err.h>
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#include <linux/smp.h>
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#include <linux/errno.h>
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#include <linux/ptrace.h>
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#include <linux/user.h>
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#include <linux/string.h>
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#include <linux/signal.h>
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#include <asm/cacheflush.h>
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#include <asm/io.h>
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#include <asm/uaccess.h>
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#include <asm/pgtable.h>
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#include <asm/processor.h>
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#include <asm/mmu_context.h>
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/*
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* This routine will get a word off of the process kernel stack.
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*/
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static inline unsigned long int
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get_stack_long(struct task_struct *task, int offset)
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{
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unsigned long *stack;
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stack = (unsigned long *)task_pt_regs(task);
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return stack[offset];
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}
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/*
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* This routine will put a word on the process kernel stack.
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*/
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static inline int
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put_stack_long(struct task_struct *task, int offset, unsigned long data)
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{
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unsigned long *stack;
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stack = (unsigned long *)task_pt_regs(task);
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stack[offset] = data;
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return 0;
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}
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static int reg_offset[] = {
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PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
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PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_FP, PT_LR, PT_SPU,
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};
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/*
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* Read the word at offset "off" into the "struct user". We
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* actually access the pt_regs stored on the kernel stack.
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*/
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static int ptrace_read_user(struct task_struct *tsk, unsigned long off,
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unsigned long __user *data)
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{
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unsigned long tmp;
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#ifndef NO_FPU
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struct user * dummy = NULL;
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#endif
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if ((off & 3) || off > sizeof(struct user) - 3)
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return -EIO;
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off >>= 2;
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switch (off) {
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case PT_EVB:
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__asm__ __volatile__ (
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"mvfc %0, cr5 \n\t"
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: "=r" (tmp)
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);
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break;
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case PT_CBR: {
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unsigned long psw;
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psw = get_stack_long(tsk, PT_PSW);
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tmp = ((psw >> 8) & 1);
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}
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break;
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case PT_PSW: {
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unsigned long psw, bbpsw;
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psw = get_stack_long(tsk, PT_PSW);
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bbpsw = get_stack_long(tsk, PT_BBPSW);
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tmp = ((psw >> 8) & 0xff) | ((bbpsw & 0xff) << 8);
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}
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break;
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case PT_PC:
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tmp = get_stack_long(tsk, PT_BPC);
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break;
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case PT_BPC:
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off = PT_BBPC;
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/* fall through */
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default:
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if (off < (sizeof(struct pt_regs) >> 2))
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tmp = get_stack_long(tsk, off);
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#ifndef NO_FPU
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else if (off >= (long)(&dummy->fpu >> 2) &&
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off < (long)(&dummy->u_fpvalid >> 2)) {
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if (!tsk_used_math(tsk)) {
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if (off == (long)(&dummy->fpu.fpscr >> 2))
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tmp = FPSCR_INIT;
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else
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tmp = 0;
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} else
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tmp = ((long *)(&tsk->thread.fpu >> 2))
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[off - (long)&dummy->fpu];
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} else if (off == (long)(&dummy->u_fpvalid >> 2))
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tmp = !!tsk_used_math(tsk);
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#endif /* not NO_FPU */
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else
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tmp = 0;
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}
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return put_user(tmp, data);
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}
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static int ptrace_write_user(struct task_struct *tsk, unsigned long off,
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unsigned long data)
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{
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int ret = -EIO;
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#ifndef NO_FPU
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struct user * dummy = NULL;
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#endif
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if ((off & 3) || off > sizeof(struct user) - 3)
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return -EIO;
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off >>= 2;
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switch (off) {
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case PT_EVB:
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case PT_BPC:
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case PT_SPI:
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/* We don't allow to modify evb. */
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ret = 0;
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break;
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case PT_PSW:
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case PT_CBR: {
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/* We allow to modify only cbr in psw */
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unsigned long psw;
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psw = get_stack_long(tsk, PT_PSW);
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psw = (psw & ~0x100) | ((data & 1) << 8);
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ret = put_stack_long(tsk, PT_PSW, psw);
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}
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break;
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case PT_PC:
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off = PT_BPC;
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data &= ~1;
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/* fall through */
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default:
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if (off < (sizeof(struct pt_regs) >> 2))
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ret = put_stack_long(tsk, off, data);
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#ifndef NO_FPU
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else if (off >= (long)(&dummy->fpu >> 2) &&
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off < (long)(&dummy->u_fpvalid >> 2)) {
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set_stopped_child_used_math(tsk);
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((long *)&tsk->thread.fpu)
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[off - (long)&dummy->fpu] = data;
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ret = 0;
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} else if (off == (long)(&dummy->u_fpvalid >> 2)) {
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conditional_stopped_child_used_math(data, tsk);
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ret = 0;
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}
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#endif /* not NO_FPU */
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break;
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}
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return ret;
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}
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/*
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* Get all user integer registers.
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*/
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static int ptrace_getregs(struct task_struct *tsk, void __user *uregs)
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{
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struct pt_regs *regs = task_pt_regs(tsk);
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return copy_to_user(uregs, regs, sizeof(struct pt_regs)) ? -EFAULT : 0;
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}
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/*
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* Set all user integer registers.
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*/
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static int ptrace_setregs(struct task_struct *tsk, void __user *uregs)
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{
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struct pt_regs newregs;
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int ret;
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ret = -EFAULT;
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if (copy_from_user(&newregs, uregs, sizeof(struct pt_regs)) == 0) {
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struct pt_regs *regs = task_pt_regs(tsk);
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*regs = newregs;
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ret = 0;
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}
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return ret;
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}
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static inline int
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check_condition_bit(struct task_struct *child)
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{
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return (int)((get_stack_long(child, PT_PSW) >> 8) & 1);
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}
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static int
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check_condition_src(unsigned long op, unsigned long regno1,
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unsigned long regno2, struct task_struct *child)
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{
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unsigned long reg1, reg2;
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reg2 = get_stack_long(child, reg_offset[regno2]);
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switch (op) {
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case 0x0: /* BEQ */
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reg1 = get_stack_long(child, reg_offset[regno1]);
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return reg1 == reg2;
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case 0x1: /* BNE */
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reg1 = get_stack_long(child, reg_offset[regno1]);
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return reg1 != reg2;
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case 0x8: /* BEQZ */
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return reg2 == 0;
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case 0x9: /* BNEZ */
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return reg2 != 0;
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case 0xa: /* BLTZ */
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return (int)reg2 < 0;
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case 0xb: /* BGEZ */
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return (int)reg2 >= 0;
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case 0xc: /* BLEZ */
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return (int)reg2 <= 0;
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case 0xd: /* BGTZ */
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return (int)reg2 > 0;
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default:
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/* never reached */
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return 0;
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}
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}
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static void
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compute_next_pc_for_16bit_insn(unsigned long insn, unsigned long pc,
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unsigned long *next_pc,
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struct task_struct *child)
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{
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unsigned long op, op2, op3;
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unsigned long disp;
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unsigned long regno;
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int parallel = 0;
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if (insn & 0x00008000)
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parallel = 1;
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if (pc & 3)
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insn &= 0x7fff; /* right slot */
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else
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insn >>= 16; /* left slot */
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op = (insn >> 12) & 0xf;
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op2 = (insn >> 8) & 0xf;
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op3 = (insn >> 4) & 0xf;
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if (op == 0x7) {
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switch (op2) {
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case 0xd: /* BNC */
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case 0x9: /* BNCL */
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if (!check_condition_bit(child)) {
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disp = (long)(insn << 24) >> 22;
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*next_pc = (pc & ~0x3) + disp;
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return;
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}
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break;
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case 0x8: /* BCL */
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case 0xc: /* BC */
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if (check_condition_bit(child)) {
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disp = (long)(insn << 24) >> 22;
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*next_pc = (pc & ~0x3) + disp;
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return;
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}
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break;
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case 0xe: /* BL */
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case 0xf: /* BRA */
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disp = (long)(insn << 24) >> 22;
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*next_pc = (pc & ~0x3) + disp;
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return;
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break;
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}
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} else if (op == 0x1) {
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switch (op2) {
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case 0x0:
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if (op3 == 0xf) { /* TRAP */
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#if 1
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/* pass through */
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#else
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/* kernel space is not allowed as next_pc */
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unsigned long evb;
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unsigned long trapno;
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trapno = insn & 0xf;
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__asm__ __volatile__ (
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"mvfc %0, cr5\n"
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:"=r"(evb)
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:
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);
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*next_pc = evb + (trapno << 2);
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return;
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#endif
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} else if (op3 == 0xd) { /* RTE */
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*next_pc = get_stack_long(child, PT_BPC);
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return;
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}
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break;
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case 0xc: /* JC */
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if (op3 == 0xc && check_condition_bit(child)) {
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regno = insn & 0xf;
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*next_pc = get_stack_long(child,
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reg_offset[regno]);
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return;
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}
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break;
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case 0xd: /* JNC */
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if (op3 == 0xc && !check_condition_bit(child)) {
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regno = insn & 0xf;
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*next_pc = get_stack_long(child,
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reg_offset[regno]);
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return;
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}
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break;
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case 0xe: /* JL */
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case 0xf: /* JMP */
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if (op3 == 0xc) { /* JMP */
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regno = insn & 0xf;
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*next_pc = get_stack_long(child,
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reg_offset[regno]);
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return;
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}
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break;
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}
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}
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if (parallel)
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*next_pc = pc + 4;
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else
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*next_pc = pc + 2;
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}
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static void
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compute_next_pc_for_32bit_insn(unsigned long insn, unsigned long pc,
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unsigned long *next_pc,
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struct task_struct *child)
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{
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unsigned long op;
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unsigned long op2;
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unsigned long disp;
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unsigned long regno1, regno2;
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op = (insn >> 28) & 0xf;
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if (op == 0xf) { /* branch 24-bit relative */
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op2 = (insn >> 24) & 0xf;
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switch (op2) {
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case 0xd: /* BNC */
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case 0x9: /* BNCL */
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if (!check_condition_bit(child)) {
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disp = (long)(insn << 8) >> 6;
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*next_pc = (pc & ~0x3) + disp;
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return;
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}
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break;
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case 0x8: /* BCL */
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case 0xc: /* BC */
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if (check_condition_bit(child)) {
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disp = (long)(insn << 8) >> 6;
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*next_pc = (pc & ~0x3) + disp;
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return;
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}
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break;
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case 0xe: /* BL */
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case 0xf: /* BRA */
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disp = (long)(insn << 8) >> 6;
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*next_pc = (pc & ~0x3) + disp;
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return;
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}
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} else if (op == 0xb) { /* branch 16-bit relative */
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op2 = (insn >> 20) & 0xf;
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switch (op2) {
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case 0x0: /* BEQ */
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case 0x1: /* BNE */
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case 0x8: /* BEQZ */
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case 0x9: /* BNEZ */
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case 0xa: /* BLTZ */
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case 0xb: /* BGEZ */
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case 0xc: /* BLEZ */
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case 0xd: /* BGTZ */
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regno1 = ((insn >> 24) & 0xf);
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regno2 = ((insn >> 16) & 0xf);
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if (check_condition_src(op2, regno1, regno2, child)) {
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disp = (long)(insn << 16) >> 14;
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*next_pc = (pc & ~0x3) + disp;
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return;
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}
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break;
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}
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}
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*next_pc = pc + 4;
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}
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static inline void
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compute_next_pc(unsigned long insn, unsigned long pc,
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unsigned long *next_pc, struct task_struct *child)
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{
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if (insn & 0x80000000)
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compute_next_pc_for_32bit_insn(insn, pc, next_pc, child);
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else
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compute_next_pc_for_16bit_insn(insn, pc, next_pc, child);
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}
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static int
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register_debug_trap(struct task_struct *child, unsigned long next_pc,
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unsigned long next_insn, unsigned long *code)
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{
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struct debug_trap *p = &child->thread.debug_trap;
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unsigned long addr = next_pc & ~3;
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if (p->nr_trap == MAX_TRAPS) {
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printk("kernel BUG at %s %d: p->nr_trap = %d\n",
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__FILE__, __LINE__, p->nr_trap);
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return -1;
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}
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p->addr[p->nr_trap] = addr;
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p->insn[p->nr_trap] = next_insn;
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p->nr_trap++;
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if (next_pc & 3) {
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*code = (next_insn & 0xffff0000) | 0x10f1;
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/* xxx --> TRAP1 */
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} else {
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if ((next_insn & 0x80000000) || (next_insn & 0x8000)) {
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*code = 0x10f17000;
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/* TRAP1 --> NOP */
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} else {
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*code = (next_insn & 0xffff) | 0x10f10000;
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/* TRAP1 --> xxx */
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}
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}
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return 0;
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}
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static int
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unregister_debug_trap(struct task_struct *child, unsigned long addr,
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unsigned long *code)
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{
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struct debug_trap *p = &child->thread.debug_trap;
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int i;
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/* Search debug trap entry. */
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for (i = 0; i < p->nr_trap; i++) {
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if (p->addr[i] == addr)
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break;
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}
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if (i >= p->nr_trap) {
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/* The trap may be requested from debugger.
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* ptrace should do nothing in this case.
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*/
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return 0;
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}
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/* Recover original instruction code. */
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*code = p->insn[i];
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/* Shift debug trap entries. */
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while (i < p->nr_trap - 1) {
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p->insn[i] = p->insn[i + 1];
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p->addr[i] = p->addr[i + 1];
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i++;
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}
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p->nr_trap--;
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return 1;
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}
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static void
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unregister_all_debug_traps(struct task_struct *child)
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{
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struct debug_trap *p = &child->thread.debug_trap;
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int i;
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for (i = 0; i < p->nr_trap; i++)
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access_process_vm(child, p->addr[i], &p->insn[i], sizeof(p->insn[i]), 1);
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p->nr_trap = 0;
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}
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static inline void
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invalidate_cache(void)
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{
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#if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_OPSP)
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_flush_cache_copyback_all();
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#else /* ! CONFIG_CHIP_M32700 */
|
|
|
|
/* Invalidate cache */
|
|
__asm__ __volatile__ (
|
|
"ldi r0, #-1 \n\t"
|
|
"ldi r1, #0 \n\t"
|
|
"stb r1, @r0 ; cache off \n\t"
|
|
"; \n\t"
|
|
"ldi r0, #-2 \n\t"
|
|
"ldi r1, #1 \n\t"
|
|
"stb r1, @r0 ; cache invalidate \n\t"
|
|
".fillinsn \n"
|
|
"0: \n\t"
|
|
"ldb r1, @r0 ; invalidate check \n\t"
|
|
"bnez r1, 0b \n\t"
|
|
"; \n\t"
|
|
"ldi r0, #-1 \n\t"
|
|
"ldi r1, #1 \n\t"
|
|
"stb r1, @r0 ; cache on \n\t"
|
|
: : : "r0", "r1", "memory"
|
|
);
|
|
/* FIXME: copying-back d-cache and invalidating i-cache are needed.
|
|
*/
|
|
#endif /* CONFIG_CHIP_M32700 */
|
|
}
|
|
|
|
/* Embed a debug trap (TRAP1) code */
|
|
static int
|
|
embed_debug_trap(struct task_struct *child, unsigned long next_pc)
|
|
{
|
|
unsigned long next_insn, code;
|
|
unsigned long addr = next_pc & ~3;
|
|
|
|
if (access_process_vm(child, addr, &next_insn, sizeof(next_insn), 0)
|
|
!= sizeof(next_insn)) {
|
|
return -1; /* error */
|
|
}
|
|
|
|
/* Set a trap code. */
|
|
if (register_debug_trap(child, next_pc, next_insn, &code)) {
|
|
return -1; /* error */
|
|
}
|
|
if (access_process_vm(child, addr, &code, sizeof(code), 1)
|
|
!= sizeof(code)) {
|
|
return -1; /* error */
|
|
}
|
|
return 0; /* success */
|
|
}
|
|
|
|
void
|
|
withdraw_debug_trap(struct pt_regs *regs)
|
|
{
|
|
unsigned long addr;
|
|
unsigned long code;
|
|
|
|
addr = (regs->bpc - 2) & ~3;
|
|
regs->bpc -= 2;
|
|
if (unregister_debug_trap(current, addr, &code)) {
|
|
access_process_vm(current, addr, &code, sizeof(code), 1);
|
|
invalidate_cache();
|
|
}
|
|
}
|
|
|
|
void
|
|
init_debug_traps(struct task_struct *child)
|
|
{
|
|
struct debug_trap *p = &child->thread.debug_trap;
|
|
int i;
|
|
p->nr_trap = 0;
|
|
for (i = 0; i < MAX_TRAPS; i++) {
|
|
p->addr[i] = 0;
|
|
p->insn[i] = 0;
|
|
}
|
|
}
|
|
|
|
void user_enable_single_step(struct task_struct *child)
|
|
{
|
|
unsigned long next_pc;
|
|
unsigned long pc, insn;
|
|
|
|
clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
|
|
|
|
/* Compute next pc. */
|
|
pc = get_stack_long(child, PT_BPC);
|
|
|
|
if (access_process_vm(child, pc&~3, &insn, sizeof(insn), 0)
|
|
!= sizeof(insn))
|
|
return;
|
|
|
|
compute_next_pc(insn, pc, &next_pc, child);
|
|
if (next_pc & 0x80000000)
|
|
return;
|
|
|
|
if (embed_debug_trap(child, next_pc))
|
|
return;
|
|
|
|
invalidate_cache();
|
|
}
|
|
|
|
void user_disable_single_step(struct task_struct *child)
|
|
{
|
|
unregister_all_debug_traps(child);
|
|
invalidate_cache();
|
|
}
|
|
|
|
/*
|
|
* Called by kernel/ptrace.c when detaching..
|
|
*
|
|
* Make sure single step bits etc are not set.
|
|
*/
|
|
void ptrace_disable(struct task_struct *child)
|
|
{
|
|
/* nothing to do.. */
|
|
}
|
|
|
|
long
|
|
arch_ptrace(struct task_struct *child, long request,
|
|
unsigned long addr, unsigned long data)
|
|
{
|
|
int ret;
|
|
unsigned long __user *datap = (unsigned long __user *) data;
|
|
|
|
switch (request) {
|
|
/*
|
|
* read word at location "addr" in the child process.
|
|
*/
|
|
case PTRACE_PEEKTEXT:
|
|
case PTRACE_PEEKDATA:
|
|
ret = generic_ptrace_peekdata(child, addr, data);
|
|
break;
|
|
|
|
/*
|
|
* read the word at location addr in the USER area.
|
|
*/
|
|
case PTRACE_PEEKUSR:
|
|
ret = ptrace_read_user(child, addr, datap);
|
|
break;
|
|
|
|
/*
|
|
* write the word at location addr.
|
|
*/
|
|
case PTRACE_POKETEXT:
|
|
case PTRACE_POKEDATA:
|
|
ret = generic_ptrace_pokedata(child, addr, data);
|
|
if (ret == 0 && request == PTRACE_POKETEXT)
|
|
invalidate_cache();
|
|
break;
|
|
|
|
/*
|
|
* write the word at location addr in the USER area.
|
|
*/
|
|
case PTRACE_POKEUSR:
|
|
ret = ptrace_write_user(child, addr, data);
|
|
break;
|
|
|
|
case PTRACE_GETREGS:
|
|
ret = ptrace_getregs(child, datap);
|
|
break;
|
|
|
|
case PTRACE_SETREGS:
|
|
ret = ptrace_setregs(child, datap);
|
|
break;
|
|
|
|
default:
|
|
ret = ptrace_request(child, request, addr, data);
|
|
break;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
/* notification of system call entry/exit
|
|
* - triggered by current->work.syscall_trace
|
|
*/
|
|
void do_syscall_trace(void)
|
|
{
|
|
if (!test_thread_flag(TIF_SYSCALL_TRACE))
|
|
return;
|
|
if (!(current->ptrace & PT_PTRACED))
|
|
return;
|
|
/* the 0x80 provides a way for the tracing parent to distinguish
|
|
between a syscall stop and SIGTRAP delivery */
|
|
ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
|
|
? 0x80 : 0));
|
|
|
|
/*
|
|
* this isn't the same as continuing with a signal, but it will do
|
|
* for normal use. strace only continues with a signal if the
|
|
* stopping signal is not SIGTRAP. -brl
|
|
*/
|
|
if (current->exit_code) {
|
|
send_sig(current->exit_code, current, 1);
|
|
current->exit_code = 0;
|
|
}
|
|
}
|