mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-11 19:36:44 +07:00
4f600ada70
The ICH chips have their GPIO pins organized in 2 or 3 independent groups of 32 GPIO pins. It can happen that the ACPI BIOS wants to make use of pins in one group, preventing the OS to access these. This does not prevent the OS from accessing the other group(s). This is the case for example on my Asus Z8NA-D6 board. The ACPI BIOS wants to control GPIO 18 (group 1), while I (the OS) need to control GPIO 52 and 53 (group 2) for SMBus multiplexing. So instead of checking for ACPI resource conflict on the whole I/O range, check on a per-group basis, and consider it a success if at least one of the groups is available for the OS to use. Signed-off-by: Jean Delvare <khali@linux-fr.org> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Aaron Sierra <asierra@xes-inc.com> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
50 lines
1.3 KiB
C
50 lines
1.3 KiB
C
/*
|
|
* linux/drivers/mfd/lpc_ich.h
|
|
*
|
|
* Copyright (c) 2012 Extreme Engineering Solution, Inc.
|
|
* Author: Aaron Sierra <asierra@xes-inc.com>
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License 2 as published
|
|
* by the Free Software Foundation.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License
|
|
* along with this program; see the file COPYING. If not, write to
|
|
* the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
|
|
*/
|
|
#ifndef LPC_ICH_H
|
|
#define LPC_ICH_H
|
|
|
|
/* Watchdog resources */
|
|
#define ICH_RES_IO_TCO 0
|
|
#define ICH_RES_IO_SMI 1
|
|
#define ICH_RES_MEM_OFF 2
|
|
#define ICH_RES_MEM_GCS 0
|
|
|
|
/* GPIO resources */
|
|
#define ICH_RES_GPIO 0
|
|
#define ICH_RES_GPE0 1
|
|
|
|
/* GPIO compatibility */
|
|
#define ICH_I3100_GPIO 0x401
|
|
#define ICH_V5_GPIO 0x501
|
|
#define ICH_V6_GPIO 0x601
|
|
#define ICH_V7_GPIO 0x701
|
|
#define ICH_V9_GPIO 0x801
|
|
#define ICH_V10CORP_GPIO 0xa01
|
|
#define ICH_V10CONS_GPIO 0xa11
|
|
|
|
struct lpc_ich_info {
|
|
char name[32];
|
|
unsigned int iTCO_version;
|
|
unsigned int gpio_version;
|
|
u8 use_gpio;
|
|
};
|
|
|
|
#endif
|