Ville Syrjälä b9e5ac3c18 drm/i915/chv: Force clock buffer enables ... Try to force the PHY clock buffer enables to make the clock routing work. v2: Fix the pipe B case to actually enable CH0 clock buffers Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>		2014-06-11 16:57:30 +02:00
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drm	drm/i915/chv: Force clock buffer enables	2014-06-11 16:57:30 +02:00
host1x	gpu: host1x: Rename internal functions for clarity	2014-06-05 23:10:30 +02:00
ipu-v3	gpu: ipu-v3: Register the CSI modules	2014-06-04 11:07:12 +02:00
vga	vgaswitcheroo: switch the mux to the igp on power down when runpm is enabled	2014-06-02 10:25:08 -04:00
Makefile	gpu: ipu-v3: Move i.MX IPUv3 core driver out of staging	2014-06-04 11:06:52 +02:00