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febdbfe8a9
Since the smp_mb__{before,after}*() ops are fundamentally dependent on how an arch can implement atomics it doesn't make sense to have 3 variants of them. They must all be the same. Furthermore, the 3 variants suggest they're only valid for those 3 atomic ops, while we have many more where they could be applied. So move away from smp_mb__{before,after}_{atomic,clear}_{dec,inc,bit}() and reduce the interface to just the two: smp_mb__{before,after}_atomic(). This patch prepares the way by introducing default implementations in asm-generic/barrier.h that default to a full barrier and providing __deprecated inlines for the previous 6 barriers if they're not provided by the arch. This should allow for a mostly painless transition (lots of deprecated warns in the interim). Signed-off-by: Peter Zijlstra <peterz@infradead.org> Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Link: http://lkml.kernel.org/n/tip-wr59327qdyi9mbzn6x937s4e@git.kernel.org Cc: Arnd Bergmann <arnd@arndb.de> Cc: "Chen, Gong" <gong.chen@linux.intel.com> Cc: John Sullivan <jsrhbz@kanargh.force9.co.uk> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Mauro Carvalho Chehab <m.chehab@samsung.com> Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Cc: "Theodore Ts'o" <tytso@mit.edu> Cc: linux-arch@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
188 lines
4.4 KiB
C
188 lines
4.4 KiB
C
/*
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* Generic C implementation of atomic counter operations. Usable on
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* UP systems only. Do not include in machine independent code.
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*
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* Originally implemented for MN10300.
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*
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* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*/
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#ifndef __ASM_GENERIC_ATOMIC_H
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#define __ASM_GENERIC_ATOMIC_H
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#include <asm/cmpxchg.h>
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#include <asm/barrier.h>
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#ifdef CONFIG_SMP
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/* Force people to define core atomics */
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# if !defined(atomic_add_return) || !defined(atomic_sub_return) || \
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!defined(atomic_clear_mask) || !defined(atomic_set_mask)
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# error "SMP requires a little arch-specific magic"
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# endif
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#endif
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/*
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* Atomic operations that C can't guarantee us. Useful for
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* resource counting etc..
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*/
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#define ATOMIC_INIT(i) { (i) }
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#ifdef __KERNEL__
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/**
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* atomic_read - read atomic variable
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* @v: pointer of type atomic_t
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*
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* Atomically reads the value of @v.
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*/
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#ifndef atomic_read
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#define atomic_read(v) (*(volatile int *)&(v)->counter)
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#endif
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/**
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* atomic_set - set atomic variable
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* @v: pointer of type atomic_t
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* @i: required value
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*
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* Atomically sets the value of @v to @i.
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*/
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#define atomic_set(v, i) (((v)->counter) = (i))
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#include <linux/irqflags.h>
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/**
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* atomic_add_return - add integer to atomic variable
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* @i: integer value to add
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* @v: pointer of type atomic_t
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*
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* Atomically adds @i to @v and returns the result
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*/
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#ifndef atomic_add_return
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static inline int atomic_add_return(int i, atomic_t *v)
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{
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unsigned long flags;
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int temp;
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raw_local_irq_save(flags); /* Don't trace it in an irqsoff handler */
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temp = v->counter;
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temp += i;
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v->counter = temp;
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raw_local_irq_restore(flags);
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return temp;
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}
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#endif
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/**
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* atomic_sub_return - subtract integer from atomic variable
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* @i: integer value to subtract
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* @v: pointer of type atomic_t
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*
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* Atomically subtracts @i from @v and returns the result
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*/
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#ifndef atomic_sub_return
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static inline int atomic_sub_return(int i, atomic_t *v)
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{
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unsigned long flags;
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int temp;
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raw_local_irq_save(flags); /* Don't trace it in an irqsoff handler */
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temp = v->counter;
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temp -= i;
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v->counter = temp;
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raw_local_irq_restore(flags);
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return temp;
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}
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#endif
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static inline int atomic_add_negative(int i, atomic_t *v)
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{
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return atomic_add_return(i, v) < 0;
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}
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static inline void atomic_add(int i, atomic_t *v)
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{
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atomic_add_return(i, v);
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}
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static inline void atomic_sub(int i, atomic_t *v)
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{
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atomic_sub_return(i, v);
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}
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static inline void atomic_inc(atomic_t *v)
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{
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atomic_add_return(1, v);
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}
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static inline void atomic_dec(atomic_t *v)
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{
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atomic_sub_return(1, v);
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}
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#define atomic_dec_return(v) atomic_sub_return(1, (v))
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#define atomic_inc_return(v) atomic_add_return(1, (v))
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#define atomic_sub_and_test(i, v) (atomic_sub_return((i), (v)) == 0)
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#define atomic_dec_and_test(v) (atomic_dec_return(v) == 0)
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#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
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#define atomic_xchg(ptr, v) (xchg(&(ptr)->counter, (v)))
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#define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), (old), (new)))
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static inline int __atomic_add_unless(atomic_t *v, int a, int u)
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{
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int c, old;
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c = atomic_read(v);
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while (c != u && (old = atomic_cmpxchg(v, c, c + a)) != c)
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c = old;
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return c;
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}
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/**
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* atomic_clear_mask - Atomically clear bits in atomic variable
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* @mask: Mask of the bits to be cleared
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* @v: pointer of type atomic_t
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*
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* Atomically clears the bits set in @mask from @v
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*/
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#ifndef atomic_clear_mask
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static inline void atomic_clear_mask(unsigned long mask, atomic_t *v)
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{
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unsigned long flags;
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mask = ~mask;
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raw_local_irq_save(flags); /* Don't trace it in a irqsoff handler */
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v->counter &= mask;
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raw_local_irq_restore(flags);
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}
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#endif
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/**
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* atomic_set_mask - Atomically set bits in atomic variable
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* @mask: Mask of the bits to be set
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* @v: pointer of type atomic_t
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*
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* Atomically sets the bits set in @mask in @v
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*/
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#ifndef atomic_set_mask
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static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
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{
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unsigned long flags;
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raw_local_irq_save(flags); /* Don't trace it in a irqsoff handler */
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v->counter |= mask;
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raw_local_irq_restore(flags);
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}
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#endif
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#endif /* __KERNEL__ */
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#endif /* __ASM_GENERIC_ATOMIC_H */
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