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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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8200fe4347
The TI crossbar irqchip doesn't provides any facility to configure the
wakeup sources, but the conversion to hierarchical irqdomains set the
irq_set_wake callback to irq_chip_set_wake_parent. The parent chip
(OMAP wakeupgen) has no irq_set_wake function either so the call will
fail with -ENOSYS. As a result the irq_set_wake() call in the resume
path will trigger an 'Unbalanced wake disable' warning.
Before the conversion the GIC irqchip was the top level irqchip and
correctly flagged with IRQCHIP_SKIP_SET_WAKE.
Restore the correct behaviour by removing the irq_set_type callback
from the crossbar irqchip and set the IRQCHIP_SKIP_SET_WAKE flag which
lets the irq_set_irq_wake() call from the driver succeed.
[ tglx: Massaged changelog ]
Fixes:
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.. | ||
exynos-combiner.c | ||
irq-armada-370-xp.c | ||
irq-atmel-aic5.c | ||
irq-atmel-aic-common.c | ||
irq-atmel-aic-common.h | ||
irq-atmel-aic.c | ||
irq-bcm2835.c | ||
irq-bcm7038-l1.c | ||
irq-bcm7120-l2.c | ||
irq-brcmstb-l2.c | ||
irq-clps711x.c | ||
irq-crossbar.c | ||
irq-digicolor.c | ||
irq-dw-apb-ictl.c | ||
irq-gic-common.c | ||
irq-gic-common.h | ||
irq-gic-v2m.c | ||
irq-gic-v3-its.c | ||
irq-gic-v3.c | ||
irq-gic.c | ||
irq-hip04.c | ||
irq-imgpdc.c | ||
irq-ingenic.c | ||
irq-keystone.c | ||
irq-metag-ext.c | ||
irq-metag.c | ||
irq-mips-cpu.c | ||
irq-mips-gic.c | ||
irq-mmp.c | ||
irq-moxart.c | ||
irq-mtk-sysirq.c | ||
irq-mxs.c | ||
irq-nvic.c | ||
irq-omap-intc.c | ||
irq-or1k-pic.c | ||
irq-orion.c | ||
irq-renesas-h8s.c | ||
irq-renesas-h8300h.c | ||
irq-renesas-intc-irqpin.c | ||
irq-renesas-irqc.c | ||
irq-s3c24xx.c | ||
irq-sa11x0.c | ||
irq-sirfsoc.c | ||
irq-st.c | ||
irq-sun4i.c | ||
irq-sunxi-nmi.c | ||
irq-tb10x.c | ||
irq-tegra.c | ||
irq-versatile-fpga.c | ||
irq-vf610-mscm-ir.c | ||
irq-vic.c | ||
irq-vt8500.c | ||
irq-xtensa-mx.c | ||
irq-xtensa-pic.c | ||
irq-zevio.c | ||
irqchip.c | ||
irqchip.h | ||
Kconfig | ||
Makefile | ||
spear-shirq.c |