mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-24 17:47:38 +07:00
042f01bb7f
Add the Amlogic G12A AO Clock and Reset controller driver handling generation of Always-On clocks : - AO Clocks and Reset for Always-On modules - 32K Generation for USB and CEC - SAR ADC controller clock Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Acked-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lkml.kernel.org/r/20190212162859.20743-3-narmstrong@baylibre.com
21 lines
845 B
Makefile
21 lines
845 B
Makefile
# Amlogic clock drivers
|
|
|
|
obj-$(CONFIG_COMMON_CLK_MESON_AO_CLKC) += meson-aoclk.o
|
|
obj-$(CONFIG_COMMON_CLK_MESON_DUALDIV) += clk-dualdiv.o
|
|
obj-$(CONFIG_COMMON_CLK_MESON_EE_CLKC) += meson-eeclk.o
|
|
obj-$(CONFIG_COMMON_CLK_MESON_INPUT) += clk-input.o
|
|
obj-$(CONFIG_COMMON_CLK_MESON_MPLL) += clk-mpll.o
|
|
obj-$(CONFIG_COMMON_CLK_MESON_PHASE) += clk-phase.o
|
|
obj-$(CONFIG_COMMON_CLK_MESON_PLL) += clk-pll.o
|
|
obj-$(CONFIG_COMMON_CLK_MESON_REGMAP) += clk-regmap.o
|
|
obj-$(CONFIG_COMMON_CLK_MESON_SCLK_DIV) += sclk-div.o
|
|
obj-$(CONFIG_COMMON_CLK_MESON_VID_PLL_DIV) += vid-pll-div.o
|
|
|
|
# Amlogic Clock controllers
|
|
|
|
obj-$(CONFIG_COMMON_CLK_AXG) += axg.o axg-aoclk.o
|
|
obj-$(CONFIG_COMMON_CLK_AXG_AUDIO) += axg-audio.o
|
|
obj-$(CONFIG_COMMON_CLK_GXBB) += gxbb.o gxbb-aoclk.o
|
|
obj-$(CONFIG_COMMON_CLK_G12A) += g12a.o g12a-aoclk.o
|
|
obj-$(CONFIG_COMMON_CLK_MESON8B) += meson8b.o
|