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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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25985edced
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
395 lines
11 KiB
C
395 lines
11 KiB
C
/*
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* UEFI Common Platform Error Record
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*
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* Copyright (C) 2010, Intel Corp.
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* Author: Huang Ying <ying.huang@intel.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version
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* 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef LINUX_CPER_H
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#define LINUX_CPER_H
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#include <linux/uuid.h>
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/* CPER record signature and the size */
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#define CPER_SIG_RECORD "CPER"
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#define CPER_SIG_SIZE 4
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/* Used in signature_end field in struct cper_record_header */
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#define CPER_SIG_END 0xffffffff
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/*
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* CPER record header revision, used in revision field in struct
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* cper_record_header
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*/
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#define CPER_RECORD_REV 0x0100
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/*
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* Severity difinition for error_severity in struct cper_record_header
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* and section_severity in struct cper_section_descriptor
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*/
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enum {
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CPER_SEV_RECOVERABLE,
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CPER_SEV_FATAL,
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CPER_SEV_CORRECTED,
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CPER_SEV_INFORMATIONAL,
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};
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/*
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* Validation bits difinition for validation_bits in struct
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* cper_record_header. If set, corresponding fields in struct
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* cper_record_header contain valid information.
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*
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* corresponds platform_id
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*/
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#define CPER_VALID_PLATFORM_ID 0x0001
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/* corresponds timestamp */
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#define CPER_VALID_TIMESTAMP 0x0002
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/* corresponds partition_id */
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#define CPER_VALID_PARTITION_ID 0x0004
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/*
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* Notification type used to generate error record, used in
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* notification_type in struct cper_record_header
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*
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* Corrected Machine Check
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*/
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#define CPER_NOTIFY_CMC \
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UUID_LE(0x2DCE8BB1, 0xBDD7, 0x450e, 0xB9, 0xAD, 0x9C, 0xF4, \
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0xEB, 0xD4, 0xF8, 0x90)
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/* Corrected Platform Error */
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#define CPER_NOTIFY_CPE \
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UUID_LE(0x4E292F96, 0xD843, 0x4a55, 0xA8, 0xC2, 0xD4, 0x81, \
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0xF2, 0x7E, 0xBE, 0xEE)
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/* Machine Check Exception */
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#define CPER_NOTIFY_MCE \
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UUID_LE(0xE8F56FFE, 0x919C, 0x4cc5, 0xBA, 0x88, 0x65, 0xAB, \
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0xE1, 0x49, 0x13, 0xBB)
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/* PCI Express Error */
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#define CPER_NOTIFY_PCIE \
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UUID_LE(0xCF93C01F, 0x1A16, 0x4dfc, 0xB8, 0xBC, 0x9C, 0x4D, \
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0xAF, 0x67, 0xC1, 0x04)
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/* INIT Record (for IPF) */
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#define CPER_NOTIFY_INIT \
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UUID_LE(0xCC5263E8, 0x9308, 0x454a, 0x89, 0xD0, 0x34, 0x0B, \
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0xD3, 0x9B, 0xC9, 0x8E)
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/* Non-Maskable Interrupt */
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#define CPER_NOTIFY_NMI \
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UUID_LE(0x5BAD89FF, 0xB7E6, 0x42c9, 0x81, 0x4A, 0xCF, 0x24, \
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0x85, 0xD6, 0xE9, 0x8A)
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/* BOOT Error Record */
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#define CPER_NOTIFY_BOOT \
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UUID_LE(0x3D61A466, 0xAB40, 0x409a, 0xA6, 0x98, 0xF3, 0x62, \
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0xD4, 0x64, 0xB3, 0x8F)
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/* DMA Remapping Error */
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#define CPER_NOTIFY_DMAR \
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UUID_LE(0x667DD791, 0xC6B3, 0x4c27, 0x8A, 0x6B, 0x0F, 0x8E, \
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0x72, 0x2D, 0xEB, 0x41)
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/*
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* Flags bits definitions for flags in struct cper_record_header
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* If set, the error has been recovered
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*/
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#define CPER_HW_ERROR_FLAGS_RECOVERED 0x1
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/* If set, the error is for previous boot */
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#define CPER_HW_ERROR_FLAGS_PREVERR 0x2
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/* If set, the error is injected for testing */
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#define CPER_HW_ERROR_FLAGS_SIMULATED 0x4
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/*
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* CPER section header revision, used in revision field in struct
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* cper_section_descriptor
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*/
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#define CPER_SEC_REV 0x0100
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/*
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* Validation bits difinition for validation_bits in struct
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* cper_section_descriptor. If set, corresponding fields in struct
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* cper_section_descriptor contain valid information.
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*
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* corresponds fru_id
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*/
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#define CPER_SEC_VALID_FRU_ID 0x1
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/* corresponds fru_text */
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#define CPER_SEC_VALID_FRU_TEXT 0x2
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/*
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* Flags bits definitions for flags in struct cper_section_descriptor
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*
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* If set, the section is associated with the error condition
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* directly, and should be focused on
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*/
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#define CPER_SEC_PRIMARY 0x0001
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/*
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* If set, the error was not contained within the processor or memory
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* hierarchy and the error may have propagated to persistent storage
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* or network
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*/
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#define CPER_SEC_CONTAINMENT_WARNING 0x0002
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/* If set, the component must be re-initialized or re-enabled prior to use */
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#define CPER_SEC_RESET 0x0004
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/* If set, Linux may choose to discontinue use of the resource */
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#define CPER_SEC_ERROR_THRESHOLD_EXCEEDED 0x0008
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/*
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* If set, resource could not be queried for error information due to
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* conflicts with other system software or resources. Some fields of
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* the section will be invalid
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*/
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#define CPER_SEC_RESOURCE_NOT_ACCESSIBLE 0x0010
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/*
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* If set, action has been taken to ensure error containment (such as
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* poisoning data), but the error has not been fully corrected and the
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* data has not been consumed. Linux may choose to take further
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* corrective action before the data is consumed
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*/
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#define CPER_SEC_LATENT_ERROR 0x0020
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/*
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* Section type definitions, used in section_type field in struct
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* cper_section_descriptor
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*
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* Processor Generic
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*/
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#define CPER_SEC_PROC_GENERIC \
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UUID_LE(0x9876CCAD, 0x47B4, 0x4bdb, 0xB6, 0x5E, 0x16, 0xF1, \
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0x93, 0xC4, 0xF3, 0xDB)
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/* Processor Specific: X86/X86_64 */
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#define CPER_SEC_PROC_IA \
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UUID_LE(0xDC3EA0B0, 0xA144, 0x4797, 0xB9, 0x5B, 0x53, 0xFA, \
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0x24, 0x2B, 0x6E, 0x1D)
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/* Processor Specific: IA64 */
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#define CPER_SEC_PROC_IPF \
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UUID_LE(0xE429FAF1, 0x3CB7, 0x11D4, 0x0B, 0xCA, 0x07, 0x00, \
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0x80, 0xC7, 0x3C, 0x88, 0x81)
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/* Platform Memory */
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#define CPER_SEC_PLATFORM_MEM \
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UUID_LE(0xA5BC1114, 0x6F64, 0x4EDE, 0xB8, 0x63, 0x3E, 0x83, \
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0xED, 0x7C, 0x83, 0xB1)
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#define CPER_SEC_PCIE \
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UUID_LE(0xD995E954, 0xBBC1, 0x430F, 0xAD, 0x91, 0xB4, 0x4D, \
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0xCB, 0x3C, 0x6F, 0x35)
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/* Firmware Error Record Reference */
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#define CPER_SEC_FW_ERR_REC_REF \
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UUID_LE(0x81212A96, 0x09ED, 0x4996, 0x94, 0x71, 0x8D, 0x72, \
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0x9C, 0x8E, 0x69, 0xED)
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/* PCI/PCI-X Bus */
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#define CPER_SEC_PCI_X_BUS \
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UUID_LE(0xC5753963, 0x3B84, 0x4095, 0xBF, 0x78, 0xED, 0xDA, \
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0xD3, 0xF9, 0xC9, 0xDD)
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/* PCI Component/Device */
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#define CPER_SEC_PCI_DEV \
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UUID_LE(0xEB5E4685, 0xCA66, 0x4769, 0xB6, 0xA2, 0x26, 0x06, \
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0x8B, 0x00, 0x13, 0x26)
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#define CPER_SEC_DMAR_GENERIC \
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UUID_LE(0x5B51FEF7, 0xC79D, 0x4434, 0x8F, 0x1B, 0xAA, 0x62, \
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0xDE, 0x3E, 0x2C, 0x64)
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/* Intel VT for Directed I/O specific DMAr */
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#define CPER_SEC_DMAR_VT \
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UUID_LE(0x71761D37, 0x32B2, 0x45cd, 0xA7, 0xD0, 0xB0, 0xFE, \
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0xDD, 0x93, 0xE8, 0xCF)
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/* IOMMU specific DMAr */
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#define CPER_SEC_DMAR_IOMMU \
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UUID_LE(0x036F84E1, 0x7F37, 0x428c, 0xA7, 0x9E, 0x57, 0x5F, \
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0xDF, 0xAA, 0x84, 0xEC)
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#define CPER_PROC_VALID_TYPE 0x0001
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#define CPER_PROC_VALID_ISA 0x0002
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#define CPER_PROC_VALID_ERROR_TYPE 0x0004
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#define CPER_PROC_VALID_OPERATION 0x0008
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#define CPER_PROC_VALID_FLAGS 0x0010
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#define CPER_PROC_VALID_LEVEL 0x0020
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#define CPER_PROC_VALID_VERSION 0x0040
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#define CPER_PROC_VALID_BRAND_INFO 0x0080
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#define CPER_PROC_VALID_ID 0x0100
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#define CPER_PROC_VALID_TARGET_ADDRESS 0x0200
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#define CPER_PROC_VALID_REQUESTOR_ID 0x0400
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#define CPER_PROC_VALID_RESPONDER_ID 0x0800
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#define CPER_PROC_VALID_IP 0x1000
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#define CPER_MEM_VALID_ERROR_STATUS 0x0001
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#define CPER_MEM_VALID_PHYSICAL_ADDRESS 0x0002
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#define CPER_MEM_VALID_PHYSICAL_ADDRESS_MASK 0x0004
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#define CPER_MEM_VALID_NODE 0x0008
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#define CPER_MEM_VALID_CARD 0x0010
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#define CPER_MEM_VALID_MODULE 0x0020
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#define CPER_MEM_VALID_BANK 0x0040
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#define CPER_MEM_VALID_DEVICE 0x0080
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#define CPER_MEM_VALID_ROW 0x0100
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#define CPER_MEM_VALID_COLUMN 0x0200
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#define CPER_MEM_VALID_BIT_POSITION 0x0400
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#define CPER_MEM_VALID_REQUESTOR_ID 0x0800
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#define CPER_MEM_VALID_RESPONDER_ID 0x1000
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#define CPER_MEM_VALID_TARGET_ID 0x2000
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#define CPER_MEM_VALID_ERROR_TYPE 0x4000
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#define CPER_PCIE_VALID_PORT_TYPE 0x0001
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#define CPER_PCIE_VALID_VERSION 0x0002
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#define CPER_PCIE_VALID_COMMAND_STATUS 0x0004
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#define CPER_PCIE_VALID_DEVICE_ID 0x0008
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#define CPER_PCIE_VALID_SERIAL_NUMBER 0x0010
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#define CPER_PCIE_VALID_BRIDGE_CONTROL_STATUS 0x0020
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#define CPER_PCIE_VALID_CAPABILITY 0x0040
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#define CPER_PCIE_VALID_AER_INFO 0x0080
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#define CPER_PCIE_SLOT_SHIFT 3
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/*
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* All tables and structs must be byte-packed to match CPER
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* specification, since the tables are provided by the system BIOS
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*/
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#pragma pack(1)
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struct cper_record_header {
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char signature[CPER_SIG_SIZE]; /* must be CPER_SIG_RECORD */
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__u16 revision; /* must be CPER_RECORD_REV */
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__u32 signature_end; /* must be CPER_SIG_END */
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__u16 section_count;
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__u32 error_severity;
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__u32 validation_bits;
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__u32 record_length;
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__u64 timestamp;
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uuid_le platform_id;
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uuid_le partition_id;
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uuid_le creator_id;
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uuid_le notification_type;
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__u64 record_id;
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__u32 flags;
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__u64 persistence_information;
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__u8 reserved[12]; /* must be zero */
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};
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struct cper_section_descriptor {
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__u32 section_offset; /* Offset in bytes of the
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* section body from the base
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* of the record header */
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__u32 section_length;
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__u16 revision; /* must be CPER_RECORD_REV */
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__u8 validation_bits;
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__u8 reserved; /* must be zero */
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__u32 flags;
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uuid_le section_type;
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uuid_le fru_id;
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__u32 section_severity;
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__u8 fru_text[20];
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};
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/* Generic Processor Error Section */
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struct cper_sec_proc_generic {
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__u64 validation_bits;
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__u8 proc_type;
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__u8 proc_isa;
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__u8 proc_error_type;
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__u8 operation;
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__u8 flags;
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__u8 level;
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__u16 reserved;
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__u64 cpu_version;
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char cpu_brand[128];
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__u64 proc_id;
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__u64 target_addr;
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__u64 requestor_id;
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__u64 responder_id;
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__u64 ip;
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};
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/* IA32/X64 Processor Error Section */
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struct cper_sec_proc_ia {
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__u64 validation_bits;
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__u8 lapic_id;
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__u8 cpuid[48];
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};
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/* IA32/X64 Processor Error Information Structure */
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struct cper_ia_err_info {
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uuid_le err_type;
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__u64 validation_bits;
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__u64 check_info;
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__u64 target_id;
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__u64 requestor_id;
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__u64 responder_id;
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__u64 ip;
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};
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/* IA32/X64 Processor Context Information Structure */
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struct cper_ia_proc_ctx {
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__u16 reg_ctx_type;
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__u16 reg_arr_size;
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__u32 msr_addr;
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__u64 mm_reg_addr;
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};
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/* Memory Error Section */
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struct cper_sec_mem_err {
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__u64 validation_bits;
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__u64 error_status;
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__u64 physical_addr;
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__u64 physical_addr_mask;
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__u16 node;
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__u16 card;
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__u16 module;
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__u16 bank;
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__u16 device;
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__u16 row;
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__u16 column;
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__u16 bit_pos;
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__u64 requestor_id;
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__u64 responder_id;
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__u64 target_id;
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__u8 error_type;
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};
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struct cper_sec_pcie {
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__u64 validation_bits;
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__u32 port_type;
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struct {
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__u8 minor;
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__u8 major;
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__u8 reserved[2];
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} version;
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__u16 command;
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__u16 status;
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__u32 reserved;
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struct {
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__u16 vendor_id;
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__u16 device_id;
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__u8 class_code[3];
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__u8 function;
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__u8 device;
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__u16 segment;
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__u8 bus;
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__u8 secondary_bus;
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__u16 slot;
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__u8 reserved;
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} device_id;
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struct {
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__u32 lower;
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__u32 upper;
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} serial_number;
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struct {
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__u16 secondary_status;
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__u16 control;
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} bridge;
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__u8 capability[60];
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__u8 aer_info[96];
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};
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/* Reset to default packing */
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#pragma pack()
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u64 cper_next_record_id(void);
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void cper_print_bits(const char *prefix, unsigned int bits,
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const char *strs[], unsigned int strs_size);
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#endif
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