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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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7665f3a849
Add support for setting the VTCR_EL2 per VM, rather than hard coding a value at boot time per CPU. This would allow us to tune the stage2 page table parameters per VM in the later changes. We compute the VTCR fields based on the system wide sanitised feature registers, except for the hardware management of Access Flags (VTCR_EL2.HA). It is fine to run a system with a mix of CPUs that may or may not update the page table Access Flags. Since the bit is RES0 on CPUs that don't support it, the bit should be ignored on them. Suggested-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Christoffer Dall <cdall@kernel.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
170 lines
6.1 KiB
C
170 lines
6.1 KiB
C
/*
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* Copyright (C) 2015 - ARM Ltd
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ARM64_KVM_HYP_H__
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#define __ARM64_KVM_HYP_H__
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#include <linux/compiler.h>
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#include <linux/kvm_host.h>
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#include <asm/sysreg.h>
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#define __hyp_text __section(.hyp.text) notrace
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#define read_sysreg_elx(r,nvh,vh) \
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({ \
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u64 reg; \
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asm volatile(ALTERNATIVE("mrs %0, " __stringify(r##nvh),\
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"mrs_s %0, " __stringify(r##vh),\
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ARM64_HAS_VIRT_HOST_EXTN) \
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: "=r" (reg)); \
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reg; \
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})
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#define write_sysreg_elx(v,r,nvh,vh) \
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do { \
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u64 __val = (u64)(v); \
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asm volatile(ALTERNATIVE("msr " __stringify(r##nvh) ", %x0",\
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"msr_s " __stringify(r##vh) ", %x0",\
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ARM64_HAS_VIRT_HOST_EXTN) \
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: : "rZ" (__val)); \
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} while (0)
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/*
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* Unified accessors for registers that have a different encoding
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* between VHE and non-VHE. They must be specified without their "ELx"
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* encoding.
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*/
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#define read_sysreg_el2(r) \
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({ \
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u64 reg; \
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asm volatile(ALTERNATIVE("mrs %0, " __stringify(r##_EL2),\
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"mrs %0, " __stringify(r##_EL1),\
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ARM64_HAS_VIRT_HOST_EXTN) \
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: "=r" (reg)); \
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reg; \
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})
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#define write_sysreg_el2(v,r) \
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do { \
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u64 __val = (u64)(v); \
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asm volatile(ALTERNATIVE("msr " __stringify(r##_EL2) ", %x0",\
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"msr " __stringify(r##_EL1) ", %x0",\
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ARM64_HAS_VIRT_HOST_EXTN) \
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: : "rZ" (__val)); \
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} while (0)
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#define read_sysreg_el0(r) read_sysreg_elx(r, _EL0, _EL02)
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#define write_sysreg_el0(v,r) write_sysreg_elx(v, r, _EL0, _EL02)
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#define read_sysreg_el1(r) read_sysreg_elx(r, _EL1, _EL12)
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#define write_sysreg_el1(v,r) write_sysreg_elx(v, r, _EL1, _EL12)
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/* The VHE specific system registers and their encoding */
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#define sctlr_EL12 sys_reg(3, 5, 1, 0, 0)
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#define cpacr_EL12 sys_reg(3, 5, 1, 0, 2)
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#define ttbr0_EL12 sys_reg(3, 5, 2, 0, 0)
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#define ttbr1_EL12 sys_reg(3, 5, 2, 0, 1)
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#define tcr_EL12 sys_reg(3, 5, 2, 0, 2)
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#define afsr0_EL12 sys_reg(3, 5, 5, 1, 0)
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#define afsr1_EL12 sys_reg(3, 5, 5, 1, 1)
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#define esr_EL12 sys_reg(3, 5, 5, 2, 0)
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#define far_EL12 sys_reg(3, 5, 6, 0, 0)
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#define mair_EL12 sys_reg(3, 5, 10, 2, 0)
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#define amair_EL12 sys_reg(3, 5, 10, 3, 0)
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#define vbar_EL12 sys_reg(3, 5, 12, 0, 0)
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#define contextidr_EL12 sys_reg(3, 5, 13, 0, 1)
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#define cntkctl_EL12 sys_reg(3, 5, 14, 1, 0)
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#define cntp_tval_EL02 sys_reg(3, 5, 14, 2, 0)
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#define cntp_ctl_EL02 sys_reg(3, 5, 14, 2, 1)
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#define cntp_cval_EL02 sys_reg(3, 5, 14, 2, 2)
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#define cntv_tval_EL02 sys_reg(3, 5, 14, 3, 0)
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#define cntv_ctl_EL02 sys_reg(3, 5, 14, 3, 1)
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#define cntv_cval_EL02 sys_reg(3, 5, 14, 3, 2)
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#define spsr_EL12 sys_reg(3, 5, 4, 0, 0)
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#define elr_EL12 sys_reg(3, 5, 4, 0, 1)
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/**
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* hyp_alternate_select - Generates patchable code sequences that are
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* used to switch between two implementations of a function, depending
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* on the availability of a feature.
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*
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* @fname: a symbol name that will be defined as a function returning a
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* function pointer whose type will match @orig and @alt
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* @orig: A pointer to the default function, as returned by @fname when
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* @cond doesn't hold
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* @alt: A pointer to the alternate function, as returned by @fname
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* when @cond holds
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* @cond: a CPU feature (as described in asm/cpufeature.h)
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*/
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#define hyp_alternate_select(fname, orig, alt, cond) \
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typeof(orig) * __hyp_text fname(void) \
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{ \
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typeof(alt) *val = orig; \
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asm volatile(ALTERNATIVE("nop \n", \
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"mov %0, %1 \n", \
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cond) \
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: "+r" (val) : "r" (alt)); \
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return val; \
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}
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int __vgic_v2_perform_cpuif_access(struct kvm_vcpu *vcpu);
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void __vgic_v3_save_state(struct kvm_vcpu *vcpu);
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void __vgic_v3_restore_state(struct kvm_vcpu *vcpu);
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void __vgic_v3_activate_traps(struct kvm_vcpu *vcpu);
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void __vgic_v3_deactivate_traps(struct kvm_vcpu *vcpu);
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void __vgic_v3_save_aprs(struct kvm_vcpu *vcpu);
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void __vgic_v3_restore_aprs(struct kvm_vcpu *vcpu);
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int __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu);
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void __timer_enable_traps(struct kvm_vcpu *vcpu);
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void __timer_disable_traps(struct kvm_vcpu *vcpu);
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void __sysreg_save_state_nvhe(struct kvm_cpu_context *ctxt);
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void __sysreg_restore_state_nvhe(struct kvm_cpu_context *ctxt);
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void sysreg_save_host_state_vhe(struct kvm_cpu_context *ctxt);
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void sysreg_restore_host_state_vhe(struct kvm_cpu_context *ctxt);
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void sysreg_save_guest_state_vhe(struct kvm_cpu_context *ctxt);
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void sysreg_restore_guest_state_vhe(struct kvm_cpu_context *ctxt);
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void __sysreg32_save_state(struct kvm_vcpu *vcpu);
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void __sysreg32_restore_state(struct kvm_vcpu *vcpu);
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void __debug_switch_to_guest(struct kvm_vcpu *vcpu);
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void __debug_switch_to_host(struct kvm_vcpu *vcpu);
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void __fpsimd_save_state(struct user_fpsimd_state *fp_regs);
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void __fpsimd_restore_state(struct user_fpsimd_state *fp_regs);
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bool __fpsimd_enabled(void);
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void activate_traps_vhe_load(struct kvm_vcpu *vcpu);
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void deactivate_traps_vhe_put(void);
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u64 __guest_enter(struct kvm_vcpu *vcpu, struct kvm_cpu_context *host_ctxt);
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void __noreturn __hyp_do_panic(unsigned long, ...);
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/*
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* Must be called from hyp code running at EL2 with an updated VTTBR
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* and interrupts disabled.
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*/
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static __always_inline void __hyp_text __load_guest_stage2(struct kvm *kvm)
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{
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write_sysreg(kvm->arch.vtcr, vtcr_el2);
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write_sysreg(kvm->arch.vttbr, vttbr_el2);
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}
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#endif /* __ARM64_KVM_HYP_H__ */
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