Jim Wilson b8c8a9590e RISC-V: Add FP register ptrace support for gdb. ... Add a variable and a macro to describe FP registers, assuming only D is supported. FP code is conditional on CONFIG_FPU. The FP regs and FCSR are copied separately to avoid copying struct padding. Tested by hand and with the gdb testsuite. Signed-off-by: Jim Wilson <jimw@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>		2018-10-22 17:38:04 -07:00
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configs	irqchip: add a SiFive PLIC driver	2018-08-13 08:31:32 -07:00
include	RISC-V: Add FP register ptrace support for gdb.	2018-10-22 17:38:04 -07:00
kernel	RISC-V: Add FP register ptrace support for gdb.	2018-10-22 17:38:04 -07:00
lib	RISC-V: implement __lshrti3.	2018-08-13 08:31:30 -07:00
mm	mm: convert return type of handle_mm_fault() caller to vm_fault_t	2018-08-17 16:20:28 -07:00
Kconfig	kconfig: include kernel/Kconfig.preempt from init/Kconfig	2018-08-02 08:06:54 +09:00
Kconfig.debug	Kconfig: consolidate the "Kernel hacking" menu	2018-08-02 08:06:48 +09:00
Makefile	kbuild: rename LDFLAGS to KBUILD_LDFLAGS	2018-08-24 08:22:08 +09:00