mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 07:50:51 +07:00
2ed7a806d8
commit db635adc turned -DDEBUG for x86/pci on when CONFIG_PCI_DEBUG is set. In general, I agree with that change. However, it exposes a bunch of very low level PCI debugging in the early x86 path, such as: 0 reading 2 from a: ffff 1 reading 2 from a: ffff 2 reading 2 from a: ffff 3 reading 2 from a: 300 3 reading 2 from 0: 1002 3 reading 2 from 2: 515e These statements add a lot of noise to the boot and aren't likely to be necessary even when handling random upstream bug reports. [In contrast, statements such as these: pci 0000:02:04.0: found [14e4:164a] class 000200 header type 00 pci 0000:02:04.0: reg 10: [mem 0xf8000000-0xf9ffffff 64bit] pci 0000:02:04.0: reg 30: [mem 0x00000000-0x0001ffff pref] are indeed useful when remote debugging users' machines] Remove the noisy printks and save electrons everywhere. Cc: Bjorn Helgaas <bjorn.helgaas@hp.com> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Andi Kleen <andi@firstfloor.org> Cc: Ingo Molnar <mingo@elte.hu> Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
112 lines
2.3 KiB
C
112 lines
2.3 KiB
C
#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <asm/pci-direct.h>
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#include <asm/io.h>
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#include <asm/pci_x86.h>
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/* Direct PCI access. This is used for PCI accesses in early boot before
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the PCI subsystem works. */
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u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset)
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{
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u32 v;
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outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
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v = inl(0xcfc);
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return v;
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}
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u8 read_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset)
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{
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u8 v;
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outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
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v = inb(0xcfc + (offset&3));
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return v;
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}
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u16 read_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset)
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{
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u16 v;
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outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
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v = inw(0xcfc + (offset&2));
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return v;
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}
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void write_pci_config(u8 bus, u8 slot, u8 func, u8 offset,
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u32 val)
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{
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outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
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outl(val, 0xcfc);
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}
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void write_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset, u8 val)
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{
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outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
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outb(val, 0xcfc + (offset&3));
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}
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void write_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset, u16 val)
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{
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outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
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outw(val, 0xcfc + (offset&2));
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}
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int early_pci_allowed(void)
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{
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return (pci_probe & (PCI_PROBE_CONF1|PCI_PROBE_NOEARLY)) ==
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PCI_PROBE_CONF1;
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}
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void early_dump_pci_device(u8 bus, u8 slot, u8 func)
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{
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int i;
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int j;
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u32 val;
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printk(KERN_INFO "pci 0000:%02x:%02x.%d config space:",
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bus, slot, func);
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for (i = 0; i < 256; i += 4) {
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if (!(i & 0x0f))
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printk("\n %02x:",i);
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val = read_pci_config(bus, slot, func, i);
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for (j = 0; j < 4; j++) {
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printk(" %02x", val & 0xff);
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val >>= 8;
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}
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}
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printk("\n");
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}
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void early_dump_pci_devices(void)
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{
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unsigned bus, slot, func;
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if (!early_pci_allowed())
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return;
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for (bus = 0; bus < 256; bus++) {
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for (slot = 0; slot < 32; slot++) {
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for (func = 0; func < 8; func++) {
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u32 class;
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u8 type;
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class = read_pci_config(bus, slot, func,
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PCI_CLASS_REVISION);
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if (class == 0xffffffff)
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continue;
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early_dump_pci_device(bus, slot, func);
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if (func == 0) {
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type = read_pci_config_byte(bus, slot,
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func,
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PCI_HEADER_TYPE);
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if (!(type & 0x80))
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break;
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}
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}
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}
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}
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}
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