mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
f95d47caae
This patch is the meat of the PDA change. This patch makes several related changes: 1: Most significantly, %gs is now used in the kernel. This means that on entry, the old value of %gs is saved away, and it is reloaded with __KERNEL_PDA. 2: entry.S constructs the stack in the shape of struct pt_regs, and this is passed around the kernel so that the process's saved register state can be accessed. Unfortunately struct pt_regs doesn't currently have space for %gs (or %fs). This patch extends pt_regs to add space for gs (no space is allocated for %fs, since it won't be used, and it would just complicate the code in entry.S to work around the space). 3: Because %gs is now saved on the stack like %ds, %es and the integer registers, there are a number of places where it no longer needs to be handled specially; namely context switch, and saving/restoring the register state in a signal context. 4: And since kernel threads run in kernel space and call normal kernel code, they need to be created with their %gs == __KERNEL_PDA. Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Chuck Ebbert <76306.1226@compuserve.com> Cc: Zachary Amsden <zach@vmware.com> Cc: Jan Beulich <jbeulich@novell.com> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org>
72 lines
1.7 KiB
C
72 lines
1.7 KiB
C
#ifndef __I386_SCHED_H
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#define __I386_SCHED_H
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#include <asm/desc.h>
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#include <asm/atomic.h>
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#include <asm/pgalloc.h>
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#include <asm/tlbflush.h>
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/*
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* Used for LDT copy/destruction.
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*/
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int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
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void destroy_context(struct mm_struct *mm);
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static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
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{
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#ifdef CONFIG_SMP
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unsigned cpu = smp_processor_id();
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if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_OK)
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per_cpu(cpu_tlbstate, cpu).state = TLBSTATE_LAZY;
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#endif
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}
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static inline void switch_mm(struct mm_struct *prev,
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struct mm_struct *next,
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struct task_struct *tsk)
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{
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int cpu = smp_processor_id();
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if (likely(prev != next)) {
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/* stop flush ipis for the previous mm */
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cpu_clear(cpu, prev->cpu_vm_mask);
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#ifdef CONFIG_SMP
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per_cpu(cpu_tlbstate, cpu).state = TLBSTATE_OK;
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per_cpu(cpu_tlbstate, cpu).active_mm = next;
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#endif
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cpu_set(cpu, next->cpu_vm_mask);
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/* Re-load page tables */
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load_cr3(next->pgd);
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/*
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* load the LDT, if the LDT is different:
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*/
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if (unlikely(prev->context.ldt != next->context.ldt))
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load_LDT_nolock(&next->context);
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}
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#ifdef CONFIG_SMP
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else {
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per_cpu(cpu_tlbstate, cpu).state = TLBSTATE_OK;
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BUG_ON(per_cpu(cpu_tlbstate, cpu).active_mm != next);
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if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
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/* We were in lazy tlb mode and leave_mm disabled
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* tlb flush IPI delivery. We must reload %cr3.
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*/
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load_cr3(next->pgd);
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load_LDT_nolock(&next->context);
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}
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}
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#endif
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}
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#define deactivate_mm(tsk, mm) \
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asm("movl %0,%%fs": :"r" (0));
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#define activate_mm(prev, next) \
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switch_mm((prev),(next),NULL)
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#endif
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