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beb2dc0a7a
Some CPUs (such as e500v1/v2) don't implement mftb and will take a trap. mfspr should work on everything that has a timebase, and is the preferred instruction according to ISA v2.06. Currently we get away with mftb on 85xx because the assembler converts it to mfspr due to -Wa,-me500. However, that flag has other effects that are undesireable for certain targets (e.g. lwsync is converted to sync), and is hostile to multiplatform kernels. Thus we would like to stop setting it for all e500-family builds. mftb/mftbu instances which are in 85xx code or common code are converted. Instances which will never run on 85xx are left alone. Signed-off-by: Scott Wood <scottwood@freescale.com>
51 lines
845 B
C
51 lines
845 B
C
#ifndef _ASM_POWERPC_TIMEX_H
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#define _ASM_POWERPC_TIMEX_H
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#ifdef __KERNEL__
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/*
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* PowerPC architecture timex specifications
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*/
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#include <asm/cputable.h>
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#include <asm/reg.h>
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#define CLOCK_TICK_RATE 1024000 /* Underlying HZ */
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typedef unsigned long cycles_t;
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static inline cycles_t get_cycles(void)
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{
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#ifdef __powerpc64__
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return mftb();
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#else
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cycles_t ret;
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/*
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* For the "cycle" counter we use the timebase lower half.
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* Currently only used on SMP.
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*/
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ret = 0;
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__asm__ __volatile__(
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"97: mfspr %0, %2\n"
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"99:\n"
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".section __ftr_fixup,\"a\"\n"
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".align 2\n"
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"98:\n"
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" .long %1\n"
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" .long 0\n"
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" .long 97b-98b\n"
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" .long 99b-98b\n"
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" .long 0\n"
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" .long 0\n"
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".previous"
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: "=r" (ret) : "i" (CPU_FTR_601), "i" (SPRN_TBRL));
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return ret;
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#endif
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}
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_TIMEX_H */
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