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b885d5be9c
For expected packet receiving, the hfi1 hardware checks the KDETH PSN automatically. However, when sequence error occurs, the hfi1 driver can check the sequence instead until the hardware flow generation is reloaded. TID RDMA READ and WRITE protocols implement similar software checking mechanisms, but with different flags and different local variables to store next expected PSN. Unify the handling by using only one set of flag and local variable for both TID RDMA READ and WRITE protocols. Reviewed-by: Mike Marciniszyn <mike.marciniszyn@intel.com> Reviewed-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Reviewed-by: Michael J. Ruhl <michael.j.ruhl@intel.com> Signed-off-by: Kaike Wan <kaike.wan@intel.com> Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com> |
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| .. | ||
| bnxt_re | ||
| cxgb3 | ||
| cxgb4 | ||
| hfi1 | ||
| hns | ||
| i40iw | ||
| mlx4 | ||
| mlx5 | ||
| mthca | ||
| nes | ||
| ocrdma | ||
| qedr | ||
| qib | ||
| usnic | ||
| vmw_pvrdma | ||
| Makefile | ||