linux_dsm_epyc7002/arch/mips/oprofile
Wu Zhangjin 4e73238d16 MIPS: Oprofile: Fix Loongson irq handler
The interrupt enable bit for the performance counters is in the Control
    Register $24, not in the counter register.
    loongson2_perfcount_handler(), we need to use
    
    Reported-by: Xu Hengyang <hengyang@mail.ustc.edu.cn>
    Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
    Cc: linux-mips@linux-mips.org
    Patchwork: http://patchwork.linux-mips.org/patch/1198/
    Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

---
2010-05-15 21:59:54 +01:00
..
common.c MIPS: Simplify the weak annotation with __weak 2010-02-27 12:53:17 +01:00
Makefile MIPS: Loongson: Add oprofile support 2009-09-17 20:07:47 +02:00
op_impl.h oprofile: more whitespace fixes 2008-10-15 20:55:51 +02:00
op_model_loongson2.c MIPS: Oprofile: Fix Loongson irq handler 2010-05-15 21:59:54 +01:00
op_model_mipsxx.c generic-ipi: more merge fallout 2008-07-15 22:08:52 +02:00
op_model_rm9000.c oprofile: more whitespace fixes 2008-10-15 20:55:51 +02:00