linux_dsm_epyc7002/drivers/gpu
Thierry Reding b7c61d511d gpu: host1x: Resize channel register region on Tegra186 and later
The register region allocated per channel was decreased from 16384 bytes
to 256 bytes on Tegra186 and later. Resize the region to make sure every
channel (instead of only the first) is properly programmed.

Suggested-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-11-27 17:18:26 +01:00
..
drm drm, i915, amdgpu, bridge + core quirk 2018-11-02 10:58:20 -07:00
host1x gpu: host1x: Resize channel register region on Tegra186 and later 2018-11-27 17:18:26 +01:00
ipu-v3 media: v4l: mediabus: Recognise CSI-2 D-PHY and C-PHY 2018-10-04 16:06:15 -04:00
vga ALSA: hda - Enable runtime PM only for discrete GPU 2018-09-13 17:58:30 +02:00
Makefile