mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-23 01:32:46 +07:00
f7dc0157e4
We're fetching GuC/HuC firmwares directly from uc level during init_early stage but this breaks guc/huc struct isolation and also strict SW-only initialization rule for init_early. Move fw fetching to init phase and do it separately per guc/huc struct. v2: don't forget to move wopcm_init - Michele v3: fetch in init_misc phase - Michal Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Michel Thierry <michel.thierry@intel.com> Reviewed-by: Michel Thierry <michel.thierry@intel.com> #2 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20180628141522.62788-2-michal.wajdeczko@intel.com
128 lines
3.5 KiB
C
128 lines
3.5 KiB
C
/*
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* Copyright © 2016-2017 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#include <linux/types.h>
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#include "intel_huc.h"
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#include "i915_drv.h"
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void intel_huc_init_early(struct intel_huc *huc)
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{
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intel_huc_fw_init_early(huc);
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}
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int intel_huc_init_misc(struct intel_huc *huc)
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{
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struct drm_i915_private *i915 = huc_to_i915(huc);
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intel_uc_fw_fetch(i915, &huc->fw);
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return 0;
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}
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/**
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* intel_huc_auth() - Authenticate HuC uCode
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* @huc: intel_huc structure
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*
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* Called after HuC and GuC firmware loading during intel_uc_init_hw().
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*
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* This function pins HuC firmware image object into GGTT.
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* Then it invokes GuC action to authenticate passing the offset to RSA
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* signature through intel_guc_auth_huc(). It then waits for 50ms for
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* firmware verification ACK and unpins the object.
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*/
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int intel_huc_auth(struct intel_huc *huc)
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{
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struct drm_i915_private *i915 = huc_to_i915(huc);
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struct intel_guc *guc = &i915->guc;
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struct i915_vma *vma;
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u32 status;
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int ret;
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if (huc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
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return -ENOEXEC;
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vma = i915_gem_object_ggtt_pin(huc->fw.obj, NULL, 0, 0,
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PIN_OFFSET_BIAS | guc->ggtt_pin_bias);
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if (IS_ERR(vma)) {
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ret = PTR_ERR(vma);
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DRM_ERROR("HuC: Failed to pin huc fw object %d\n", ret);
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goto fail;
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}
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ret = intel_guc_auth_huc(guc,
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intel_guc_ggtt_offset(guc, vma) +
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huc->fw.rsa_offset);
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if (ret) {
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DRM_ERROR("HuC: GuC did not ack Auth request %d\n", ret);
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goto fail_unpin;
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}
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/* Check authentication status, it should be done by now */
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ret = __intel_wait_for_register(i915,
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HUC_STATUS2,
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HUC_FW_VERIFIED,
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HUC_FW_VERIFIED,
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2, 50, &status);
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if (ret) {
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DRM_ERROR("HuC: Firmware not verified %#x\n", status);
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goto fail_unpin;
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}
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i915_vma_unpin(vma);
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return 0;
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fail_unpin:
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i915_vma_unpin(vma);
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fail:
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huc->fw.load_status = INTEL_UC_FIRMWARE_FAIL;
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DRM_ERROR("HuC: Authentication failed %d\n", ret);
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return ret;
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}
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/**
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* intel_huc_check_status() - check HuC status
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* @huc: intel_huc structure
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*
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* This function reads status register to verify if HuC
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* firmware was successfully loaded.
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*
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* Returns positive value if HuC firmware is loaded and verified
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* and -ENODEV if HuC is not present.
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*/
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int intel_huc_check_status(struct intel_huc *huc)
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{
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struct drm_i915_private *dev_priv = huc_to_i915(huc);
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u32 status;
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if (!HAS_HUC(dev_priv))
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return -ENODEV;
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intel_runtime_pm_get(dev_priv);
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status = I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED;
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intel_runtime_pm_put(dev_priv);
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return status;
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}
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