mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-21 15:48:56 +07:00
00fab2350e
This patch is an extension to the zcrypt device driver to provide,
support and maintain multiple zcrypt device nodes. The individual
zcrypt device nodes can be restricted in terms of crypto cards,
domains and available ioctls. Such a device node can be used as a
base for container solutions like docker to control and restrict
the access to crypto resources.
The handling is done with a new sysfs subdir /sys/class/zcrypt.
Echoing a name (or an empty sting) into the attribute "create" creates
a new zcrypt device node. In /sys/class/zcrypt a new link will appear
which points to the sysfs device tree of this new device. The
attribute files "ioctlmask", "apmask" and "aqmask" in this directory
are used to customize this new zcrypt device node instance. Finally
the zcrypt device node can be destroyed by echoing the name into
/sys/class/zcrypt/destroy. The internal structs holding the device
info are reference counted - so a destroy will not hard remove a
device but only marks it as removable when the reference counter drops
to zero.
The mask values are bitmaps in big endian order starting with bit 0.
So adapter number 0 is the leftmost bit, mask is 0x8000... The sysfs
attributes accept 2 different formats:
* Absolute hex string starting with 0x like "0x12345678" does set
the mask starting from left to right. If the given string is shorter
than the mask it is padded with 0s on the right. If the string is
longer than the mask an error comes back (EINVAL).
* Relative format - a concatenation (done with ',') of the
terms +<bitnr>[-<bitnr>] or -<bitnr>[-<bitnr>]. <bitnr> may be any
valid number (hex, decimal or octal) in the range 0...255. Here are
some examples:
"+0-15,+32,-128,-0xFF"
"-0-255,+1-16,+0x128"
"+1,+2,+3,+4,-5,-7-10"
A simple usage examples:
# create new zcrypt device 'my_zcrypt':
echo "my_zcrypt" >/sys/class/zcrypt/create
# go into the device dir of this new device
echo "my_zcrypt" >create
cd my_zcrypt/
ls -l
total 0
-rw-r--r-- 1 root root 4096 Jul 20 15:23 apmask
-rw-r--r-- 1 root root 4096 Jul 20 15:23 aqmask
-r--r--r-- 1 root root 4096 Jul 20 15:23 dev
-rw-r--r-- 1 root root 4096 Jul 20 15:23 ioctlmask
lrwxrwxrwx 1 root root 0 Jul 20 15:23 subsystem -> ../../../../class/zcrypt
...
# customize this zcrypt node clone
# enable only adapter 0 and 2
echo "0xa0" >apmask
# enable only domain 6
echo "+6" >aqmask
# enable all 256 ioctls
echo "+0-255" >ioctls
# now the /dev/my_zcrypt may be used
# finally destroy it
echo "my_zcrypt" >/sys/class/zcrypt/destroy
Please note that a very similar 'filtering behavior' also applies to
the parent z90crypt device. The two mask attributes apmask and aqmask
in /sys/bus/ap act the very same for the z90crypt device node. However
the implementation here is totally different as the ap bus acts on
bind/unbind of queue devices and associated drivers but the effect is
still the same. So there are two filters active for each additional
zcrypt device node: The adapter/domain needs to be enabled on the ap
bus level and it needs to be active on the zcrypt device node level.
Signed-off-by: Harald Freudenberger <freude@linux.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
776 lines
23 KiB
Plaintext
776 lines
23 KiB
Plaintext
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menuconfig CRYPTO_HW
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bool "Hardware crypto devices"
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default y
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---help---
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Say Y here to get to see options for hardware crypto devices and
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processors. This option alone does not add any kernel code.
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If you say N, all options in this submenu will be skipped and disabled.
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if CRYPTO_HW
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config CRYPTO_DEV_PADLOCK
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tristate "Support for VIA PadLock ACE"
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depends on X86 && !UML
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help
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Some VIA processors come with an integrated crypto engine
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(so called VIA PadLock ACE, Advanced Cryptography Engine)
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that provides instructions for very fast cryptographic
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operations with supported algorithms.
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The instructions are used only when the CPU supports them.
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Otherwise software encryption is used.
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config CRYPTO_DEV_PADLOCK_AES
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tristate "PadLock driver for AES algorithm"
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depends on CRYPTO_DEV_PADLOCK
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select CRYPTO_BLKCIPHER
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select CRYPTO_AES
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help
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Use VIA PadLock for AES algorithm.
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Available in VIA C3 and newer CPUs.
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If unsure say M. The compiled module will be
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called padlock-aes.
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config CRYPTO_DEV_PADLOCK_SHA
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tristate "PadLock driver for SHA1 and SHA256 algorithms"
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depends on CRYPTO_DEV_PADLOCK
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select CRYPTO_HASH
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select CRYPTO_SHA1
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select CRYPTO_SHA256
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help
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Use VIA PadLock for SHA1/SHA256 algorithms.
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Available in VIA C7 and newer processors.
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If unsure say M. The compiled module will be
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called padlock-sha.
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config CRYPTO_DEV_GEODE
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tristate "Support for the Geode LX AES engine"
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depends on X86_32 && PCI
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select CRYPTO_ALGAPI
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select CRYPTO_BLKCIPHER
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help
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Say 'Y' here to use the AMD Geode LX processor on-board AES
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engine for the CryptoAPI AES algorithm.
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To compile this driver as a module, choose M here: the module
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will be called geode-aes.
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config ZCRYPT
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tristate "Support for s390 cryptographic adapters"
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depends on S390
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select HW_RANDOM
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help
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Select this option if you want to enable support for
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s390 cryptographic adapters like:
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+ PCI-X Cryptographic Coprocessor (PCIXCC)
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+ Crypto Express 2,3,4 or 5 Coprocessor (CEXxC)
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+ Crypto Express 2,3,4 or 5 Accelerator (CEXxA)
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+ Crypto Express 4 or 5 EP11 Coprocessor (CEXxP)
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config ZCRYPT_MULTIDEVNODES
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bool "Support for multiple zcrypt device nodes"
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default y
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depends on S390
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depends on ZCRYPT
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help
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With this option enabled the zcrypt device driver can
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provide multiple devices nodes in /dev. Each device
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node can get customized to limit access and narrow
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down the use of the available crypto hardware.
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config PKEY
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tristate "Kernel API for protected key handling"
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depends on S390
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depends on ZCRYPT
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help
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With this option enabled the pkey kernel module provides an API
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for creation and handling of protected keys. Other parts of the
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kernel or userspace applications may use these functions.
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Select this option if you want to enable the kernel and userspace
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API for proteced key handling.
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Please note that creation of protected keys from secure keys
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requires to have at least one CEX card in coprocessor mode
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available at runtime.
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config CRYPTO_PAES_S390
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tristate "PAES cipher algorithms"
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depends on S390
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depends on ZCRYPT
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depends on PKEY
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select CRYPTO_ALGAPI
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select CRYPTO_BLKCIPHER
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help
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This is the s390 hardware accelerated implementation of the
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AES cipher algorithms for use with protected key.
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Select this option if you want to use the paes cipher
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for example to use protected key encrypted devices.
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config CRYPTO_SHA1_S390
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tristate "SHA1 digest algorithm"
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depends on S390
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select CRYPTO_HASH
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help
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This is the s390 hardware accelerated implementation of the
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SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
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It is available as of z990.
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config CRYPTO_SHA256_S390
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tristate "SHA256 digest algorithm"
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depends on S390
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select CRYPTO_HASH
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help
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This is the s390 hardware accelerated implementation of the
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SHA256 secure hash standard (DFIPS 180-2).
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It is available as of z9.
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config CRYPTO_SHA512_S390
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tristate "SHA384 and SHA512 digest algorithm"
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depends on S390
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select CRYPTO_HASH
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help
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This is the s390 hardware accelerated implementation of the
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SHA512 secure hash standard.
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It is available as of z10.
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config CRYPTO_DES_S390
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tristate "DES and Triple DES cipher algorithms"
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depends on S390
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select CRYPTO_ALGAPI
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select CRYPTO_BLKCIPHER
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select CRYPTO_DES
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help
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This is the s390 hardware accelerated implementation of the
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DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
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As of z990 the ECB and CBC mode are hardware accelerated.
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As of z196 the CTR mode is hardware accelerated.
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config CRYPTO_AES_S390
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tristate "AES cipher algorithms"
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depends on S390
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select CRYPTO_ALGAPI
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select CRYPTO_BLKCIPHER
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help
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This is the s390 hardware accelerated implementation of the
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AES cipher algorithms (FIPS-197).
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As of z9 the ECB and CBC modes are hardware accelerated
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for 128 bit keys.
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As of z10 the ECB and CBC modes are hardware accelerated
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for all AES key sizes.
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As of z196 the CTR mode is hardware accelerated for all AES
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key sizes and XTS mode is hardware accelerated for 256 and
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512 bit keys.
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config S390_PRNG
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tristate "Pseudo random number generator device driver"
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depends on S390
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default "m"
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help
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Select this option if you want to use the s390 pseudo random number
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generator. The PRNG is part of the cryptographic processor functions
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and uses triple-DES to generate secure random numbers like the
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ANSI X9.17 standard. User-space programs access the
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pseudo-random-number device through the char device /dev/prandom.
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It is available as of z9.
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config CRYPTO_GHASH_S390
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tristate "GHASH digest algorithm"
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depends on S390
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select CRYPTO_HASH
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help
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This is the s390 hardware accelerated implementation of the
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GHASH message digest algorithm for GCM (Galois/Counter Mode).
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It is available as of z196.
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config CRYPTO_CRC32_S390
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tristate "CRC-32 algorithms"
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depends on S390
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select CRYPTO_HASH
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select CRC32
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help
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Select this option if you want to use hardware accelerated
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implementations of CRC algorithms. With this option, you
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can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
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and CRC-32C (Castagnoli).
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It is available with IBM z13 or later.
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config CRYPTO_DEV_MARVELL_CESA
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tristate "Marvell's Cryptographic Engine driver"
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depends on PLAT_ORION || ARCH_MVEBU
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select CRYPTO_AES
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select CRYPTO_DES
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select CRYPTO_BLKCIPHER
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select CRYPTO_HASH
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select SRAM
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help
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This driver allows you to utilize the Cryptographic Engines and
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Security Accelerator (CESA) which can be found on MVEBU and ORION
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platforms.
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This driver supports CPU offload through DMA transfers.
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config CRYPTO_DEV_NIAGARA2
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tristate "Niagara2 Stream Processing Unit driver"
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select CRYPTO_DES
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select CRYPTO_BLKCIPHER
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select CRYPTO_HASH
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select CRYPTO_MD5
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select CRYPTO_SHA1
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select CRYPTO_SHA256
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depends on SPARC64
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help
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Each core of a Niagara2 processor contains a Stream
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Processing Unit, which itself contains several cryptographic
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sub-units. One set provides the Modular Arithmetic Unit,
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used for SSL offload. The other set provides the Cipher
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Group, which can perform encryption, decryption, hashing,
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checksumming, and raw copies.
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config CRYPTO_DEV_HIFN_795X
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tristate "Driver HIFN 795x crypto accelerator chips"
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select CRYPTO_DES
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select CRYPTO_BLKCIPHER
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select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
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depends on PCI
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depends on !ARCH_DMA_ADDR_T_64BIT
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help
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This option allows you to have support for HIFN 795x crypto adapters.
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config CRYPTO_DEV_HIFN_795X_RNG
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bool "HIFN 795x random number generator"
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depends on CRYPTO_DEV_HIFN_795X
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help
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Select this option if you want to enable the random number generator
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on the HIFN 795x crypto adapters.
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source drivers/crypto/caam/Kconfig
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config CRYPTO_DEV_TALITOS
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tristate "Talitos Freescale Security Engine (SEC)"
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select CRYPTO_AEAD
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select CRYPTO_AUTHENC
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select CRYPTO_BLKCIPHER
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select CRYPTO_HASH
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select HW_RANDOM
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depends on FSL_SOC
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help
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Say 'Y' here to use the Freescale Security Engine (SEC)
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to offload cryptographic algorithm computation.
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The Freescale SEC is present on PowerQUICC 'E' processors, such
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as the MPC8349E and MPC8548E.
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To compile this driver as a module, choose M here: the module
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will be called talitos.
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config CRYPTO_DEV_TALITOS1
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bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
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depends on CRYPTO_DEV_TALITOS
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depends on PPC_8xx || PPC_82xx
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default y
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help
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Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
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found on MPC82xx or the Freescale Security Engine (SEC Lite)
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version 1.2 found on MPC8xx
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config CRYPTO_DEV_TALITOS2
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bool "SEC2+ (SEC version 2.0 or upper)"
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depends on CRYPTO_DEV_TALITOS
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default y if !PPC_8xx
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help
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Say 'Y' here to use the Freescale Security Engine (SEC)
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version 2 and following as found on MPC83xx, MPC85xx, etc ...
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config CRYPTO_DEV_IXP4XX
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tristate "Driver for IXP4xx crypto hardware acceleration"
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depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
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select CRYPTO_DES
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select CRYPTO_AEAD
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select CRYPTO_AUTHENC
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select CRYPTO_BLKCIPHER
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help
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Driver for the IXP4xx NPE crypto engine.
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config CRYPTO_DEV_PPC4XX
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tristate "Driver AMCC PPC4xx crypto accelerator"
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depends on PPC && 4xx
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select CRYPTO_HASH
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select CRYPTO_AEAD
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select CRYPTO_AES
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select CRYPTO_CCM
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select CRYPTO_CTR
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select CRYPTO_GCM
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select CRYPTO_BLKCIPHER
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help
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This option allows you to have support for AMCC crypto acceleration.
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config HW_RANDOM_PPC4XX
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bool "PowerPC 4xx generic true random number generator support"
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depends on CRYPTO_DEV_PPC4XX && HW_RANDOM
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default y
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---help---
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This option provides the kernel-side support for the TRNG hardware
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found in the security function of some PowerPC 4xx SoCs.
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config CRYPTO_DEV_OMAP
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tristate "Support for OMAP crypto HW accelerators"
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depends on ARCH_OMAP2PLUS
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help
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OMAP processors have various crypto HW accelerators. Select this if
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you want to use the OMAP modules for any of the crypto algorithms.
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if CRYPTO_DEV_OMAP
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config CRYPTO_DEV_OMAP_SHAM
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tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
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depends on ARCH_OMAP2PLUS
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select CRYPTO_SHA1
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select CRYPTO_MD5
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select CRYPTO_SHA256
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select CRYPTO_SHA512
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select CRYPTO_HMAC
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help
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OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
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want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
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config CRYPTO_DEV_OMAP_AES
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tristate "Support for OMAP AES hw engine"
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depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
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select CRYPTO_AES
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select CRYPTO_BLKCIPHER
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select CRYPTO_ENGINE
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select CRYPTO_CBC
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select CRYPTO_ECB
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select CRYPTO_CTR
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select CRYPTO_AEAD
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help
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OMAP processors have AES module accelerator. Select this if you
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want to use the OMAP module for AES algorithms.
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config CRYPTO_DEV_OMAP_DES
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tristate "Support for OMAP DES/3DES hw engine"
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depends on ARCH_OMAP2PLUS
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select CRYPTO_DES
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select CRYPTO_BLKCIPHER
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select CRYPTO_ENGINE
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help
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OMAP processors have DES/3DES module accelerator. Select this if you
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want to use the OMAP module for DES and 3DES algorithms. Currently
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the ECB and CBC modes of operation are supported by the driver. Also
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accesses made on unaligned boundaries are supported.
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endif # CRYPTO_DEV_OMAP
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config CRYPTO_DEV_PICOXCELL
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tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
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depends on (ARCH_PICOXCELL || COMPILE_TEST) && HAVE_CLK
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select CRYPTO_AEAD
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select CRYPTO_AES
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select CRYPTO_AUTHENC
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select CRYPTO_BLKCIPHER
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select CRYPTO_DES
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select CRYPTO_CBC
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select CRYPTO_ECB
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select CRYPTO_SEQIV
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help
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This option enables support for the hardware offload engines in the
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Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
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and for 3gpp Layer 2 ciphering support.
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Saying m here will build a module named pipcoxcell_crypto.
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config CRYPTO_DEV_SAHARA
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tristate "Support for SAHARA crypto accelerator"
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depends on ARCH_MXC && OF
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select CRYPTO_BLKCIPHER
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select CRYPTO_AES
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select CRYPTO_ECB
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help
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This option enables support for the SAHARA HW crypto accelerator
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found in some Freescale i.MX chips.
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config CRYPTO_DEV_MXC_SCC
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tristate "Support for Freescale Security Controller (SCC)"
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depends on ARCH_MXC && OF
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select CRYPTO_BLKCIPHER
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select CRYPTO_DES
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help
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This option enables support for the Security Controller (SCC)
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found in Freescale i.MX25 chips.
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config CRYPTO_DEV_EXYNOS_RNG
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tristate "EXYNOS HW pseudo random number generator support"
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depends on ARCH_EXYNOS || COMPILE_TEST
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depends on HAS_IOMEM
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select CRYPTO_RNG
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---help---
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This driver provides kernel-side support through the
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cryptographic API for the pseudo random number generator hardware
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found on Exynos SoCs.
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To compile this driver as a module, choose M here: the
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module will be called exynos-rng.
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If unsure, say Y.
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config CRYPTO_DEV_S5P
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tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
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depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
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depends on HAS_IOMEM
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select CRYPTO_AES
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select CRYPTO_BLKCIPHER
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help
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This option allows you to have support for S5P crypto acceleration.
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Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
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algorithms execution.
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config CRYPTO_DEV_EXYNOS_HASH
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bool "Support for Samsung Exynos HASH accelerator"
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depends on CRYPTO_DEV_S5P
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depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m
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select CRYPTO_SHA1
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select CRYPTO_MD5
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select CRYPTO_SHA256
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help
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Select this to offload Exynos from HASH MD5/SHA1/SHA256.
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This will select software SHA1, MD5 and SHA256 as they are
|
|
needed for small and zero-size messages.
|
|
HASH algorithms will be disabled if EXYNOS_RNG
|
|
is enabled due to hw conflict.
|
|
|
|
config CRYPTO_DEV_NX
|
|
bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
|
|
depends on PPC64
|
|
help
|
|
This enables support for the NX hardware cryptographic accelerator
|
|
coprocessor that is in IBM PowerPC P7+ or later processors. This
|
|
does not actually enable any drivers, it only allows you to select
|
|
which acceleration type (encryption and/or compression) to enable.
|
|
|
|
if CRYPTO_DEV_NX
|
|
source "drivers/crypto/nx/Kconfig"
|
|
endif
|
|
|
|
config CRYPTO_DEV_UX500
|
|
tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
|
|
depends on ARCH_U8500
|
|
help
|
|
Driver for ST-Ericsson UX500 crypto engine.
|
|
|
|
if CRYPTO_DEV_UX500
|
|
source "drivers/crypto/ux500/Kconfig"
|
|
endif # if CRYPTO_DEV_UX500
|
|
|
|
config CRYPTO_DEV_ATMEL_AUTHENC
|
|
tristate "Support for Atmel IPSEC/SSL hw accelerator"
|
|
depends on ARCH_AT91 || COMPILE_TEST
|
|
select CRYPTO_AUTHENC
|
|
select CRYPTO_DEV_ATMEL_AES
|
|
select CRYPTO_DEV_ATMEL_SHA
|
|
help
|
|
Some Atmel processors can combine the AES and SHA hw accelerators
|
|
to enhance support of IPSEC/SSL.
|
|
Select this if you want to use the Atmel modules for
|
|
authenc(hmac(shaX),Y(cbc)) algorithms.
|
|
|
|
config CRYPTO_DEV_ATMEL_AES
|
|
tristate "Support for Atmel AES hw accelerator"
|
|
depends on ARCH_AT91 || COMPILE_TEST
|
|
select CRYPTO_AES
|
|
select CRYPTO_AEAD
|
|
select CRYPTO_BLKCIPHER
|
|
help
|
|
Some Atmel processors have AES hw accelerator.
|
|
Select this if you want to use the Atmel module for
|
|
AES algorithms.
|
|
|
|
To compile this driver as a module, choose M here: the module
|
|
will be called atmel-aes.
|
|
|
|
config CRYPTO_DEV_ATMEL_TDES
|
|
tristate "Support for Atmel DES/TDES hw accelerator"
|
|
depends on ARCH_AT91 || COMPILE_TEST
|
|
select CRYPTO_DES
|
|
select CRYPTO_BLKCIPHER
|
|
help
|
|
Some Atmel processors have DES/TDES hw accelerator.
|
|
Select this if you want to use the Atmel module for
|
|
DES/TDES algorithms.
|
|
|
|
To compile this driver as a module, choose M here: the module
|
|
will be called atmel-tdes.
|
|
|
|
config CRYPTO_DEV_ATMEL_SHA
|
|
tristate "Support for Atmel SHA hw accelerator"
|
|
depends on ARCH_AT91 || COMPILE_TEST
|
|
select CRYPTO_HASH
|
|
help
|
|
Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
|
|
hw accelerator.
|
|
Select this if you want to use the Atmel module for
|
|
SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
|
|
|
|
To compile this driver as a module, choose M here: the module
|
|
will be called atmel-sha.
|
|
|
|
config CRYPTO_DEV_ATMEL_ECC
|
|
tristate "Support for Microchip / Atmel ECC hw accelerator"
|
|
depends on ARCH_AT91 || COMPILE_TEST
|
|
depends on I2C
|
|
select CRYPTO_ECDH
|
|
select CRC16
|
|
help
|
|
Microhip / Atmel ECC hw accelerator.
|
|
Select this if you want to use the Microchip / Atmel module for
|
|
ECDH algorithm.
|
|
|
|
To compile this driver as a module, choose M here: the module
|
|
will be called atmel-ecc.
|
|
|
|
config CRYPTO_DEV_CCP
|
|
bool "Support for AMD Secure Processor"
|
|
depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
|
|
help
|
|
The AMD Secure Processor provides support for the Cryptographic Coprocessor
|
|
(CCP) and the Platform Security Processor (PSP) devices.
|
|
|
|
if CRYPTO_DEV_CCP
|
|
source "drivers/crypto/ccp/Kconfig"
|
|
endif
|
|
|
|
config CRYPTO_DEV_MXS_DCP
|
|
tristate "Support for Freescale MXS DCP"
|
|
depends on (ARCH_MXS || ARCH_MXC)
|
|
select STMP_DEVICE
|
|
select CRYPTO_CBC
|
|
select CRYPTO_ECB
|
|
select CRYPTO_AES
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_HASH
|
|
help
|
|
The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
|
|
co-processor on the die.
|
|
|
|
To compile this driver as a module, choose M here: the module
|
|
will be called mxs-dcp.
|
|
|
|
source "drivers/crypto/qat/Kconfig"
|
|
source "drivers/crypto/cavium/cpt/Kconfig"
|
|
source "drivers/crypto/cavium/nitrox/Kconfig"
|
|
|
|
config CRYPTO_DEV_CAVIUM_ZIP
|
|
tristate "Cavium ZIP driver"
|
|
depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
|
|
---help---
|
|
Select this option if you want to enable compression/decompression
|
|
acceleration on Cavium's ARM based SoCs
|
|
|
|
config CRYPTO_DEV_QCE
|
|
tristate "Qualcomm crypto engine accelerator"
|
|
depends on ARCH_QCOM || COMPILE_TEST
|
|
depends on HAS_IOMEM
|
|
select CRYPTO_AES
|
|
select CRYPTO_DES
|
|
select CRYPTO_ECB
|
|
select CRYPTO_CBC
|
|
select CRYPTO_XTS
|
|
select CRYPTO_CTR
|
|
select CRYPTO_BLKCIPHER
|
|
help
|
|
This driver supports Qualcomm crypto engine accelerator
|
|
hardware. To compile this driver as a module, choose M here. The
|
|
module will be called qcrypto.
|
|
|
|
config CRYPTO_DEV_QCOM_RNG
|
|
tristate "Qualcomm Random Number Generator Driver"
|
|
depends on ARCH_QCOM || COMPILE_TEST
|
|
select CRYPTO_RNG
|
|
help
|
|
This driver provides support for the Random Number
|
|
Generator hardware found on Qualcomm SoCs.
|
|
|
|
To compile this driver as a module, choose M here. The
|
|
module will be called qcom-rng. If unsure, say N.
|
|
|
|
config CRYPTO_DEV_VMX
|
|
bool "Support for VMX cryptographic acceleration instructions"
|
|
depends on PPC64 && VSX
|
|
help
|
|
Support for VMX cryptographic acceleration instructions.
|
|
|
|
source "drivers/crypto/vmx/Kconfig"
|
|
|
|
config CRYPTO_DEV_IMGTEC_HASH
|
|
tristate "Imagination Technologies hardware hash accelerator"
|
|
depends on MIPS || COMPILE_TEST
|
|
select CRYPTO_MD5
|
|
select CRYPTO_SHA1
|
|
select CRYPTO_SHA256
|
|
select CRYPTO_HASH
|
|
help
|
|
This driver interfaces with the Imagination Technologies
|
|
hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
|
|
hashing algorithms.
|
|
|
|
config CRYPTO_DEV_SUN4I_SS
|
|
tristate "Support for Allwinner Security System cryptographic accelerator"
|
|
depends on ARCH_SUNXI && !64BIT
|
|
select CRYPTO_MD5
|
|
select CRYPTO_SHA1
|
|
select CRYPTO_AES
|
|
select CRYPTO_DES
|
|
select CRYPTO_BLKCIPHER
|
|
help
|
|
Some Allwinner SoC have a crypto accelerator named
|
|
Security System. Select this if you want to use it.
|
|
The Security System handle AES/DES/3DES ciphers in CBC mode
|
|
and SHA1 and MD5 hash algorithms.
|
|
|
|
To compile this driver as a module, choose M here: the module
|
|
will be called sun4i-ss.
|
|
|
|
config CRYPTO_DEV_SUN4I_SS_PRNG
|
|
bool "Support for Allwinner Security System PRNG"
|
|
depends on CRYPTO_DEV_SUN4I_SS
|
|
select CRYPTO_RNG
|
|
help
|
|
Select this option if you want to provide kernel-side support for
|
|
the Pseudo-Random Number Generator found in the Security System.
|
|
|
|
config CRYPTO_DEV_ROCKCHIP
|
|
tristate "Rockchip's Cryptographic Engine driver"
|
|
depends on OF && ARCH_ROCKCHIP
|
|
select CRYPTO_AES
|
|
select CRYPTO_DES
|
|
select CRYPTO_MD5
|
|
select CRYPTO_SHA1
|
|
select CRYPTO_SHA256
|
|
select CRYPTO_HASH
|
|
select CRYPTO_BLKCIPHER
|
|
|
|
help
|
|
This driver interfaces with the hardware crypto accelerator.
|
|
Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
|
|
|
|
config CRYPTO_DEV_MEDIATEK
|
|
tristate "MediaTek's EIP97 Cryptographic Engine driver"
|
|
depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST
|
|
select CRYPTO_AES
|
|
select CRYPTO_AEAD
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_CTR
|
|
select CRYPTO_SHA1
|
|
select CRYPTO_SHA256
|
|
select CRYPTO_SHA512
|
|
select CRYPTO_HMAC
|
|
help
|
|
This driver allows you to utilize the hardware crypto accelerator
|
|
EIP97 which can be found on the MT7623 MT2701, MT8521p, etc ....
|
|
Select this if you want to use it for AES/SHA1/SHA2 algorithms.
|
|
|
|
source "drivers/crypto/chelsio/Kconfig"
|
|
|
|
source "drivers/crypto/virtio/Kconfig"
|
|
|
|
config CRYPTO_DEV_BCM_SPU
|
|
tristate "Broadcom symmetric crypto/hash acceleration support"
|
|
depends on ARCH_BCM_IPROC
|
|
depends on MAILBOX
|
|
default m
|
|
select CRYPTO_DES
|
|
select CRYPTO_MD5
|
|
select CRYPTO_SHA1
|
|
select CRYPTO_SHA256
|
|
select CRYPTO_SHA512
|
|
help
|
|
This driver provides support for Broadcom crypto acceleration using the
|
|
Secure Processing Unit (SPU). The SPU driver registers ablkcipher,
|
|
ahash, and aead algorithms with the kernel cryptographic API.
|
|
|
|
source "drivers/crypto/stm32/Kconfig"
|
|
|
|
config CRYPTO_DEV_SAFEXCEL
|
|
tristate "Inside Secure's SafeXcel cryptographic engine driver"
|
|
depends on OF
|
|
depends on (ARM64 && ARCH_MVEBU) || (COMPILE_TEST && 64BIT)
|
|
select CRYPTO_AES
|
|
select CRYPTO_AUTHENC
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_DES
|
|
select CRYPTO_HASH
|
|
select CRYPTO_HMAC
|
|
select CRYPTO_MD5
|
|
select CRYPTO_SHA1
|
|
select CRYPTO_SHA256
|
|
select CRYPTO_SHA512
|
|
help
|
|
This driver interfaces with the SafeXcel EIP-197 cryptographic engine
|
|
designed by Inside Secure. Select this if you want to use CBC/ECB
|
|
chain mode, AES cipher mode and SHA1/SHA224/SHA256/SHA512 hash
|
|
algorithms.
|
|
|
|
config CRYPTO_DEV_ARTPEC6
|
|
tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
|
|
depends on ARM && (ARCH_ARTPEC || COMPILE_TEST)
|
|
depends on OF
|
|
select CRYPTO_AEAD
|
|
select CRYPTO_AES
|
|
select CRYPTO_ALGAPI
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_CTR
|
|
select CRYPTO_HASH
|
|
select CRYPTO_SHA1
|
|
select CRYPTO_SHA256
|
|
select CRYPTO_SHA512
|
|
help
|
|
Enables the driver for the on-chip crypto accelerator
|
|
of Axis ARTPEC SoCs.
|
|
|
|
To compile this driver as a module, choose M here.
|
|
|
|
config CRYPTO_DEV_CCREE
|
|
tristate "Support for ARM TrustZone CryptoCell family of security processors"
|
|
depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA
|
|
default n
|
|
select CRYPTO_HASH
|
|
select CRYPTO_BLKCIPHER
|
|
select CRYPTO_DES
|
|
select CRYPTO_AEAD
|
|
select CRYPTO_AUTHENC
|
|
select CRYPTO_SHA1
|
|
select CRYPTO_MD5
|
|
select CRYPTO_SHA256
|
|
select CRYPTO_SHA512
|
|
select CRYPTO_HMAC
|
|
select CRYPTO_AES
|
|
select CRYPTO_CBC
|
|
select CRYPTO_ECB
|
|
select CRYPTO_CTR
|
|
select CRYPTO_XTS
|
|
help
|
|
Say 'Y' to enable a driver for the REE interface of the Arm
|
|
TrustZone CryptoCell family of processors. Currently the
|
|
CryptoCell 712, 710 and 630 are supported.
|
|
Choose this if you wish to use hardware acceleration of
|
|
cryptographic operations on the system REE.
|
|
If unsure say Y.
|
|
|
|
source "drivers/crypto/hisilicon/Kconfig"
|
|
|
|
endif # CRYPTO_HW
|