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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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e725d26c48
With thermal subsystem rework it is necessary to tune current cpufreq code to use cpu frequency change as a potential cooling device. Now the cpu cooling device is registered only when proper nodes and properties are available in device tree. Lack of them, however, will not prevent cpufreq for normal operation. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
249 lines
6.5 KiB
C
249 lines
6.5 KiB
C
/*
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* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* EXYNOS - CPU frequency scaling support for EXYNOS series
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/regulator/consumer.h>
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#include <linux/cpufreq.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/cpu_cooling.h>
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#include <linux/cpu.h>
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#include "exynos-cpufreq.h"
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static struct exynos_dvfs_info *exynos_info;
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static struct thermal_cooling_device *cdev;
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static struct regulator *arm_regulator;
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static unsigned int locking_frequency;
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static int exynos_cpufreq_get_index(unsigned int freq)
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{
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struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
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struct cpufreq_frequency_table *pos;
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cpufreq_for_each_entry(pos, freq_table)
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if (pos->frequency == freq)
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break;
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if (pos->frequency == CPUFREQ_TABLE_END)
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return -EINVAL;
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return pos - freq_table;
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}
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static int exynos_cpufreq_scale(unsigned int target_freq)
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{
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struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
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unsigned int *volt_table = exynos_info->volt_table;
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struct cpufreq_policy *policy = cpufreq_cpu_get(0);
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unsigned int arm_volt, safe_arm_volt = 0;
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unsigned int mpll_freq_khz = exynos_info->mpll_freq_khz;
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struct device *dev = exynos_info->dev;
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unsigned int old_freq;
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int index, old_index;
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int ret = 0;
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old_freq = policy->cur;
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/*
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* The policy max have been changed so that we cannot get proper
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* old_index with cpufreq_frequency_table_target(). Thus, ignore
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* policy and get the index from the raw frequency table.
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*/
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old_index = exynos_cpufreq_get_index(old_freq);
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if (old_index < 0) {
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ret = old_index;
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goto out;
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}
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index = exynos_cpufreq_get_index(target_freq);
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if (index < 0) {
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ret = index;
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goto out;
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}
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/*
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* ARM clock source will be changed APLL to MPLL temporary
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* To support this level, need to control regulator for
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* required voltage level
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*/
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if (exynos_info->need_apll_change != NULL) {
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if (exynos_info->need_apll_change(old_index, index) &&
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(freq_table[index].frequency < mpll_freq_khz) &&
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(freq_table[old_index].frequency < mpll_freq_khz))
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safe_arm_volt = volt_table[exynos_info->pll_safe_idx];
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}
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arm_volt = volt_table[index];
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/* When the new frequency is higher than current frequency */
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if ((target_freq > old_freq) && !safe_arm_volt) {
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/* Firstly, voltage up to increase frequency */
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ret = regulator_set_voltage(arm_regulator, arm_volt, arm_volt);
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if (ret) {
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dev_err(dev, "failed to set cpu voltage to %d\n",
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arm_volt);
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return ret;
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}
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}
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if (safe_arm_volt) {
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ret = regulator_set_voltage(arm_regulator, safe_arm_volt,
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safe_arm_volt);
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if (ret) {
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dev_err(dev, "failed to set cpu voltage to %d\n",
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safe_arm_volt);
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return ret;
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}
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}
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exynos_info->set_freq(old_index, index);
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/* When the new frequency is lower than current frequency */
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if ((target_freq < old_freq) ||
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((target_freq > old_freq) && safe_arm_volt)) {
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/* down the voltage after frequency change */
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ret = regulator_set_voltage(arm_regulator, arm_volt,
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arm_volt);
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if (ret) {
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dev_err(dev, "failed to set cpu voltage to %d\n",
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arm_volt);
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goto out;
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}
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}
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out:
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cpufreq_cpu_put(policy);
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return ret;
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}
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static int exynos_target(struct cpufreq_policy *policy, unsigned int index)
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{
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return exynos_cpufreq_scale(exynos_info->freq_table[index].frequency);
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}
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static int exynos_cpufreq_cpu_init(struct cpufreq_policy *policy)
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{
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policy->clk = exynos_info->cpu_clk;
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policy->suspend_freq = locking_frequency;
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return cpufreq_generic_init(policy, exynos_info->freq_table, 100000);
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}
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static struct cpufreq_driver exynos_driver = {
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.flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
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.verify = cpufreq_generic_frequency_table_verify,
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.target_index = exynos_target,
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.get = cpufreq_generic_get,
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.init = exynos_cpufreq_cpu_init,
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.name = "exynos_cpufreq",
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.attr = cpufreq_generic_attr,
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#ifdef CONFIG_ARM_EXYNOS_CPU_FREQ_BOOST_SW
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.boost_supported = true,
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#endif
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#ifdef CONFIG_PM
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.suspend = cpufreq_generic_suspend,
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#endif
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};
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static int exynos_cpufreq_probe(struct platform_device *pdev)
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{
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struct device_node *cpus, *np;
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int ret = -EINVAL;
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exynos_info = kzalloc(sizeof(*exynos_info), GFP_KERNEL);
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if (!exynos_info)
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return -ENOMEM;
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exynos_info->dev = &pdev->dev;
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if (of_machine_is_compatible("samsung,exynos4210")) {
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exynos_info->type = EXYNOS_SOC_4210;
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ret = exynos4210_cpufreq_init(exynos_info);
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} else if (of_machine_is_compatible("samsung,exynos4212")) {
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exynos_info->type = EXYNOS_SOC_4212;
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ret = exynos4x12_cpufreq_init(exynos_info);
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} else if (of_machine_is_compatible("samsung,exynos4412")) {
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exynos_info->type = EXYNOS_SOC_4412;
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ret = exynos4x12_cpufreq_init(exynos_info);
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} else if (of_machine_is_compatible("samsung,exynos5250")) {
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exynos_info->type = EXYNOS_SOC_5250;
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ret = exynos5250_cpufreq_init(exynos_info);
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} else {
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pr_err("%s: Unknown SoC type\n", __func__);
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return -ENODEV;
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}
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if (ret)
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goto err_vdd_arm;
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if (exynos_info->set_freq == NULL) {
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dev_err(&pdev->dev, "No set_freq function (ERR)\n");
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goto err_vdd_arm;
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}
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arm_regulator = regulator_get(NULL, "vdd_arm");
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if (IS_ERR(arm_regulator)) {
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dev_err(&pdev->dev, "failed to get resource vdd_arm\n");
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goto err_vdd_arm;
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}
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/* Done here as we want to capture boot frequency */
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locking_frequency = clk_get_rate(exynos_info->cpu_clk) / 1000;
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ret = cpufreq_register_driver(&exynos_driver);
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if (ret)
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goto err_cpufreq_reg;
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cpus = of_find_node_by_path("/cpus");
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if (!cpus) {
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pr_err("failed to find cpus node\n");
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return 0;
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}
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np = of_get_next_child(cpus, NULL);
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if (!np) {
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pr_err("failed to find cpus child node\n");
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of_node_put(cpus);
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return 0;
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}
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if (of_find_property(np, "#cooling-cells", NULL)) {
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cdev = of_cpufreq_cooling_register(np,
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cpu_present_mask);
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if (IS_ERR(cdev))
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pr_err("running cpufreq without cooling device: %ld\n",
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PTR_ERR(cdev));
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}
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of_node_put(np);
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of_node_put(cpus);
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return 0;
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err_cpufreq_reg:
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dev_err(&pdev->dev, "failed to register cpufreq driver\n");
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regulator_put(arm_regulator);
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err_vdd_arm:
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kfree(exynos_info);
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return -EINVAL;
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}
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static struct platform_driver exynos_cpufreq_platdrv = {
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.driver = {
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.name = "exynos-cpufreq",
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},
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.probe = exynos_cpufreq_probe,
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};
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module_platform_driver(exynos_cpufreq_platdrv);
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