Anson Huang b716aad97e clk: imx: imx7d: correct video pll clock tree ... There is a test divider and post divider in video PLL, test divider is placed before post divider, all clocks that can select parent from video PLL should be from post divider, NOT from pll_video_main, below are clock tree dump before and after this patch: Before: pll_video_main pll_video_main_bypass pll_video_main_clk lcdif_pixel_src lcdif_pixel_cg lcdif_pixel_pre_div lcdif_pixel_post_div lcdif_pixel_root_clk After: pll_video_main pll_video_main_bypass pll_video_main_clk pll_video_test_div pll_video_post_div lcdif_pixel_src lcdif_pixel_cg lcdif_pixel_pre_div lcdif_pixel_post_div lcdif_pixel_root_clk Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>		2018-03-01 08:13:38 +08:00
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at91	clk: at91: pmc: Support backup for programmable clocks	2017-12-21 16:34:06 -08:00
axis
axs10x
bcm	clk: iproc: Minor tidy up of iproc pll data structures	2017-12-28 14:53:37 -08:00
berlin
h8300	clk: h8300: pr_err() strings should end with newlines	2017-12-06 22:40:02 -08:00
hisilicon	Merge branch 'clk-divider-container' into clk-next	2018-01-26 16:43:14 -08:00
imgtec	Update MIPS email addresses	2017-11-03 09:02:30 -07:00
imx	clk: imx: imx7d: correct video pll clock tree	2018-03-01 08:13:38 +08:00
ingenic	clk: Add Ingenic jz4770 CGU driver	2018-01-18 22:05:55 +00:00
keystone
loongson1
mediatek	clk: mediatek: adjust dependency of reset.c to avoid unexpectedly being built	2018-01-10 13:41:15 -08:00
meson	clk: meson-axg: fix potential NULL dereference in axg_clkc_probe()	2018-01-10 13:24:36 -08:00
microchip
mmp	We have two changes to the core framework this time around. The first being a	2017-11-17 20:04:24 -08:00
mvebu	Merge branches 'clk-iproc', 'clk-mvebu' and 'clk-qcom-a53' into clk-next	2018-01-26 16:41:58 -08:00
mxs
nxp	Merge branch 'clk-divider-container' into clk-next	2018-01-26 16:43:14 -08:00
pistachio
pxa	clk: pxa: unbreak lookup of CLK_POUT	2017-12-28 10:43:30 -08:00
qcom	Merge branch 'clk-divider-container' into clk-next	2018-01-26 16:43:14 -08:00
renesas	clk: renesas: r8a7796: Add FDP clock	2018-01-05 11:14:38 +01:00
rockchip	We have two changes to the core framework this time around. The first being a	2017-11-17 20:04:24 -08:00
samsung	We have two changes to the core framework this time around. The first being a	2017-11-17 20:04:24 -08:00
sirf	We have two changes to the core framework this time around. The first being a	2017-11-17 20:04:24 -08:00
socfpga	License cleanup: add SPDX GPL-2.0 license identifier to files with no license	2017-11-02 11:10:55 +01:00
spear	SPEAr: clk: pr_err() strings should end with newlines	2017-12-06 22:39:59 -08:00
sprd	Merge branch 'clk-divider-container' into clk-next	2018-01-26 16:43:14 -08:00
st	License cleanup: add SPDX GPL-2.0 license identifier to files with no license	2017-11-02 11:10:55 +01:00
sunxi	The core framework has a handful of patches this time around, mostly due	2018-02-01 16:56:07 -08:00
sunxi-ng	Merge branches 'clk-aspeed', 'clk-lock-UP', 'clk-mediatek' and 'clk-allwinner' into clk-next	2018-01-26 16:43:39 -08:00
tegra	We have two changes to the core framework this time around. The first being a	2017-11-17 20:04:24 -08:00
ti	Merge branches 'clk-qcom-alpha-pll', 'clk-check-ops-ptr', 'clk-protect-rate' and 'clk-omap' into clk-next	2018-01-26 16:41:39 -08:00
uniphier	We have two changes to the core framework this time around. The first being a	2017-11-17 20:04:24 -08:00
ux500	We have two changes to the core framework this time around. The first being a	2017-11-17 20:04:24 -08:00
versatile	We have two changes to the core framework this time around. The first being a	2017-11-17 20:04:24 -08:00
x86
zte	clk: move clock common macros out from vendor directories	2017-12-21 15:00:38 -08:00
zynq
clk-asm9260.c
clk-aspeed.c	clk: aspeed: Handle inverse polarity of USB port 1 clock gate	2018-01-26 16:22:48 -08:00
clk-axi-clkgen.c	clk: axi-clkgen: Round closest in round_rate() and recalc_rate()	2017-12-21 18:07:53 -08:00
clk-axm5516.c
clk-bulk.c
clk-cdce706.c
clk-cdce925.c	clk: cdce925: remove redundant check for non-null parent_name	2017-11-13 17:44:15 -08:00
clk-clps711x.c
clk-composite.c
clk-conf.c
clk-cs2000-cp.c
clk-devres.c
clk-divider.c	clk: divider: fix incorrect usage of container_of	2017-12-28 15:16:04 -08:00
clk-efm32gg.c
clk-fixed-factor.c
clk-fixed-rate.c
clk-fractional-divider.c
clk-gate.c
clk-gemini.c	License cleanup: add SPDX GPL-2.0 license identifier to files with no license	2017-11-02 11:10:55 +01:00
clk-gpio.c	clk: clk-gpio: Request GPIO descriptor as LOW	2017-11-02 01:20:40 -07:00
clk-hi655x.c
clk-highbank.c
clk-hsdk-pll.c	ARC: clk: fix spelling mistake: "configurarion" -> "configuration"	2017-11-13 17:44:26 -08:00
clk-max77686.c
clk-moxart.c
clk-multiplier.c
clk-mux.c	clk: clk-mux: Improve a size determination in clk_hw_register_mux_table()	2017-11-13 17:28:39 -08:00
clk-nomadik.c
clk-nspire.c
clk-oxnas.c
clk-palmas.c
clk-pwm.c
clk-qoriq.c	clk: qoriq: add more divider clocks support	2017-12-21 15:57:28 -08:00
clk-rk808.c
clk-s2mps11.c
clk-scpi.c
clk-si514.c
clk-si570.c
clk-si5351.c	clk: si5351: _si5351_clkout_reset_pll() can be static	2017-12-28 10:49:48 -08:00
clk-si5351.h
clk-stm32f4.c	clk: stm32f4: pr_err() strings should end with newlines	2017-12-06 22:39:51 -08:00
clk-stm32h7.c	clk: stm32-h7: fix copyright	2017-12-06 23:07:34 -08:00
clk-tango4.c	License cleanup: add SPDX GPL-2.0 license identifier to files with no license	2017-11-02 11:10:55 +01:00
clk-twl6040.c
clk-u300.c	clk: clk-u300: Fix a typo in two comment lines	2017-11-13 17:39:43 -08:00
clk-versaclock5.c
clk-vt8500.c
clk-wm831x.c
clk-xgene.c	clk: clk-xgene: Adjust six checks for null pointers	2017-11-13 17:40:03 -08:00
clk.c	The core framework has a handful of patches this time around, mostly due	2018-02-01 16:56:07 -08:00
clk.h	clk: Move __clk_{get,put}() into private clk.h API	2018-01-04 15:13:29 -08:00
clkdev.c	clk: Prepare to remove asm-generic/clkdev.h	2018-01-02 16:12:00 -08:00
Kconfig	Merge branches 'clk-aspeed', 'clk-lock-UP', 'clk-mediatek' and 'clk-allwinner' into clk-next	2018-01-26 16:43:39 -08:00
Makefile	Merge branches 'clk-aspeed', 'clk-lock-UP', 'clk-mediatek' and 'clk-allwinner' into clk-next	2018-01-26 16:43:39 -08:00