mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 10:06:43 +07:00
d0ed062a8b
support dual-role mode; there are two ways to switch between host and device modes, one is by idpin, another is by debugfs which depends on user input. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
295 lines
7.4 KiB
C
295 lines
7.4 KiB
C
/*
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* mtu3_dr.c - dual role switch and host glue layer
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*
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* Copyright (C) 2016 MediaTek Inc.
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*
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* Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/clk.h>
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#include <linux/iopoll.h>
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#include <linux/irq.h>
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#include <linux/kernel.h>
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#include <linux/mfd/syscon.h>
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#include <linux/of_device.h>
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#include <linux/regmap.h>
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#include "mtu3.h"
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#include "mtu3_dr.h"
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#define PERI_WK_CTRL1 0x404
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#define UWK_CTL1_IS_C(x) (((x) & 0xf) << 26)
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#define UWK_CTL1_IS_E BIT(25)
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#define UWK_CTL1_IDDIG_C(x) (((x) & 0xf) << 11) /* cycle debounce */
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#define UWK_CTL1_IDDIG_E BIT(10) /* enable debounce */
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#define UWK_CTL1_IDDIG_P BIT(9) /* polarity */
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#define UWK_CTL1_IS_P BIT(6) /* polarity for ip sleep */
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/*
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* ip-sleep wakeup mode:
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* all clocks can be turn off, but power domain should be kept on
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*/
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static void ssusb_wakeup_ip_sleep_en(struct ssusb_mtk *ssusb)
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{
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u32 tmp;
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struct regmap *pericfg = ssusb->pericfg;
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regmap_read(pericfg, PERI_WK_CTRL1, &tmp);
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tmp &= ~UWK_CTL1_IS_P;
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tmp &= ~(UWK_CTL1_IS_C(0xf));
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tmp |= UWK_CTL1_IS_C(0x8);
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regmap_write(pericfg, PERI_WK_CTRL1, tmp);
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regmap_write(pericfg, PERI_WK_CTRL1, tmp | UWK_CTL1_IS_E);
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regmap_read(pericfg, PERI_WK_CTRL1, &tmp);
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dev_dbg(ssusb->dev, "%s(): WK_CTRL1[P6,E25,C26:29]=%#x\n",
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__func__, tmp);
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}
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static void ssusb_wakeup_ip_sleep_dis(struct ssusb_mtk *ssusb)
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{
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u32 tmp;
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regmap_read(ssusb->pericfg, PERI_WK_CTRL1, &tmp);
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tmp &= ~UWK_CTL1_IS_E;
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regmap_write(ssusb->pericfg, PERI_WK_CTRL1, tmp);
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}
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int ssusb_wakeup_of_property_parse(struct ssusb_mtk *ssusb,
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struct device_node *dn)
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{
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struct device *dev = ssusb->dev;
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/*
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* Wakeup function is optional, so it is not an error if this property
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* does not exist, and in such case, no need to get relative
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* properties anymore.
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*/
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ssusb->wakeup_en = of_property_read_bool(dn, "mediatek,enable-wakeup");
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if (!ssusb->wakeup_en)
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return 0;
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ssusb->wk_deb_p0 = devm_clk_get(dev, "wakeup_deb_p0");
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if (IS_ERR(ssusb->wk_deb_p0)) {
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dev_err(dev, "fail to get wakeup_deb_p0\n");
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return PTR_ERR(ssusb->wk_deb_p0);
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}
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if (of_property_read_bool(dn, "wakeup_deb_p1")) {
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ssusb->wk_deb_p1 = devm_clk_get(dev, "wakeup_deb_p1");
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if (IS_ERR(ssusb->wk_deb_p1)) {
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dev_err(dev, "fail to get wakeup_deb_p1\n");
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return PTR_ERR(ssusb->wk_deb_p1);
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}
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}
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ssusb->pericfg = syscon_regmap_lookup_by_phandle(dn,
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"mediatek,syscon-wakeup");
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if (IS_ERR(ssusb->pericfg)) {
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dev_err(dev, "fail to get pericfg regs\n");
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return PTR_ERR(ssusb->pericfg);
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}
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return 0;
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}
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static int ssusb_wakeup_clks_enable(struct ssusb_mtk *ssusb)
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{
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int ret;
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ret = clk_prepare_enable(ssusb->wk_deb_p0);
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if (ret) {
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dev_err(ssusb->dev, "failed to enable wk_deb_p0\n");
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goto usb_p0_err;
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}
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ret = clk_prepare_enable(ssusb->wk_deb_p1);
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if (ret) {
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dev_err(ssusb->dev, "failed to enable wk_deb_p1\n");
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goto usb_p1_err;
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}
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return 0;
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usb_p1_err:
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clk_disable_unprepare(ssusb->wk_deb_p0);
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usb_p0_err:
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return -EINVAL;
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}
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static void ssusb_wakeup_clks_disable(struct ssusb_mtk *ssusb)
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{
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clk_disable_unprepare(ssusb->wk_deb_p1);
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clk_disable_unprepare(ssusb->wk_deb_p0);
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}
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static void host_ports_num_get(struct ssusb_mtk *ssusb)
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{
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u32 xhci_cap;
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xhci_cap = mtu3_readl(ssusb->ippc_base, U3D_SSUSB_IP_XHCI_CAP);
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ssusb->u2_ports = SSUSB_IP_XHCI_U2_PORT_NUM(xhci_cap);
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ssusb->u3_ports = SSUSB_IP_XHCI_U3_PORT_NUM(xhci_cap);
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dev_dbg(ssusb->dev, "host - u2_ports:%d, u3_ports:%d\n",
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ssusb->u2_ports, ssusb->u3_ports);
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}
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/* only configure ports will be used later */
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int ssusb_host_enable(struct ssusb_mtk *ssusb)
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{
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void __iomem *ibase = ssusb->ippc_base;
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int num_u3p = ssusb->u3_ports;
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int num_u2p = ssusb->u2_ports;
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u32 check_clk;
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u32 value;
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int i;
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/* power on host ip */
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mtu3_clrbits(ibase, U3D_SSUSB_IP_PW_CTRL1, SSUSB_IP_HOST_PDN);
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/* power on and enable all u3 ports */
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for (i = 0; i < num_u3p; i++) {
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value = mtu3_readl(ibase, SSUSB_U3_CTRL(i));
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value &= ~(SSUSB_U3_PORT_PDN | SSUSB_U3_PORT_DIS);
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value |= SSUSB_U3_PORT_HOST_SEL;
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mtu3_writel(ibase, SSUSB_U3_CTRL(i), value);
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}
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/* power on and enable all u2 ports */
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for (i = 0; i < num_u2p; i++) {
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value = mtu3_readl(ibase, SSUSB_U2_CTRL(i));
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value &= ~(SSUSB_U2_PORT_PDN | SSUSB_U2_PORT_DIS);
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value |= SSUSB_U2_PORT_HOST_SEL;
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mtu3_writel(ibase, SSUSB_U2_CTRL(i), value);
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}
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check_clk = SSUSB_XHCI_RST_B_STS;
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if (num_u3p)
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check_clk = SSUSB_U3_MAC_RST_B_STS;
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return ssusb_check_clocks(ssusb, check_clk);
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}
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int ssusb_host_disable(struct ssusb_mtk *ssusb, bool suspend)
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{
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void __iomem *ibase = ssusb->ippc_base;
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int num_u3p = ssusb->u3_ports;
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int num_u2p = ssusb->u2_ports;
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u32 value;
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int ret;
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int i;
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/* power down and disable all u3 ports */
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for (i = 0; i < num_u3p; i++) {
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value = mtu3_readl(ibase, SSUSB_U3_CTRL(i));
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value |= SSUSB_U3_PORT_PDN;
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value |= suspend ? 0 : SSUSB_U3_PORT_DIS;
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mtu3_writel(ibase, SSUSB_U3_CTRL(i), value);
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}
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/* power down and disable all u2 ports */
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for (i = 0; i < num_u2p; i++) {
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value = mtu3_readl(ibase, SSUSB_U2_CTRL(i));
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value |= SSUSB_U2_PORT_PDN;
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value |= suspend ? 0 : SSUSB_U2_PORT_DIS;
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mtu3_writel(ibase, SSUSB_U2_CTRL(i), value);
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}
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/* power down host ip */
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mtu3_setbits(ibase, U3D_SSUSB_IP_PW_CTRL1, SSUSB_IP_HOST_PDN);
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if (!suspend)
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return 0;
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/* wait for host ip to sleep */
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ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS1, value,
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(value & SSUSB_IP_SLEEP_STS), 100, 100000);
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if (ret)
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dev_err(ssusb->dev, "ip sleep failed!!!\n");
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return ret;
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}
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static void ssusb_host_setup(struct ssusb_mtk *ssusb)
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{
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host_ports_num_get(ssusb);
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/*
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* power on host and power on/enable all ports
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* if support OTG, gadget driver will switch port0 to device mode
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*/
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ssusb_host_enable(ssusb);
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/* if port0 supports dual-role, works as host mode by default */
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ssusb_set_vbus(&ssusb->otg_switch, 1);
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}
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static void ssusb_host_cleanup(struct ssusb_mtk *ssusb)
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{
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if (ssusb->is_host)
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ssusb_set_vbus(&ssusb->otg_switch, 0);
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ssusb_host_disable(ssusb, false);
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}
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/*
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* If host supports multiple ports, the VBUSes(5V) of ports except port0
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* which supports OTG are better to be enabled by default in DTS.
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* Because the host driver will keep link with devices attached when system
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* enters suspend mode, so no need to control VBUSes after initialization.
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*/
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int ssusb_host_init(struct ssusb_mtk *ssusb, struct device_node *parent_dn)
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{
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struct device *parent_dev = ssusb->dev;
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int ret;
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ssusb_host_setup(ssusb);
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ret = of_platform_populate(parent_dn, NULL, NULL, parent_dev);
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if (ret) {
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dev_dbg(parent_dev, "failed to create child devices at %s\n",
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parent_dn->full_name);
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return ret;
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}
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dev_info(parent_dev, "xHCI platform device register success...\n");
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return 0;
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}
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void ssusb_host_exit(struct ssusb_mtk *ssusb)
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{
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of_platform_depopulate(ssusb->dev);
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ssusb_host_cleanup(ssusb);
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}
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int ssusb_wakeup_enable(struct ssusb_mtk *ssusb)
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{
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int ret = 0;
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if (ssusb->wakeup_en) {
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ret = ssusb_wakeup_clks_enable(ssusb);
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ssusb_wakeup_ip_sleep_en(ssusb);
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}
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return ret;
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}
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void ssusb_wakeup_disable(struct ssusb_mtk *ssusb)
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{
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if (ssusb->wakeup_en) {
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ssusb_wakeup_ip_sleep_dis(ssusb);
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ssusb_wakeup_clks_disable(ssusb);
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}
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}
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