mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-27 05:17:11 +07:00
54e43b6085
Add documentation for the bindings of the low speed SPI controller found on most bcm63xx SoCs. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
34 lines
836 B
Plaintext
34 lines
836 B
Plaintext
Binding for Broadcom BCM6348/BCM6358 SPI controller
|
|
|
|
Required properties:
|
|
- compatible: must contain one of "brcm,bcm6348-spi", "brcm,bcm6358-spi".
|
|
- reg: Base address and size of the controllers memory area.
|
|
- interrupts: Interrupt for the SPI block.
|
|
- clocks: phandle of the SPI clock.
|
|
- clock-names: has to be "spi".
|
|
- #address-cells: <1>, as required by generic SPI binding.
|
|
- #size-cells: <0>, also as required by generic SPI binding.
|
|
|
|
Optional properties:
|
|
- num-cs: some controllers have less than 8 cs signals. Defaults to 8
|
|
if absent.
|
|
|
|
Child nodes as per the generic SPI binding.
|
|
|
|
Example:
|
|
|
|
spi@10000800 {
|
|
compatible = "brcm,bcm6368-spi", "brcm,bcm6358-spi";
|
|
reg = <0x10000800 0x70c>;
|
|
|
|
interrupts = <1>;
|
|
|
|
clocks = <&clkctl 9>;
|
|
clock-names = "spi";
|
|
|
|
num-cs = <5>;
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
};
|