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1d816d3454
Specifies the AC timing parameters of the LPDDR3 memory device. Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
59 lines
1.2 KiB
Plaintext
59 lines
1.2 KiB
Plaintext
* AC timing parameters of LPDDR3 memories for a given speed-bin.
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The structures are based on LPDDR2 and extended where needed.
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Required properties:
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- compatible : Should be "jedec,lpddr3-timings"
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- min-freq : minimum DDR clock frequency for the speed-bin. Type is <u32>
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- reg : maximum DDR clock frequency for the speed-bin. Type is <u32>
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Optional properties:
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The following properties represent AC timing parameters from the memory
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data-sheet of the device for a given speed-bin. All these properties are
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of type <u32> and the default unit is ps (pico seconds).
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- tRFC
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- tRRD
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- tRPab
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- tRPpb
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- tRCD
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- tRC
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- tRAS
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- tWTR
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- tWR
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- tRTP
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- tW2W-C2C
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- tR2R-C2C
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- tFAW
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- tXSR
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- tXP
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- tCKE
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- tCKESR
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- tMRD
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Example:
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timings_samsung_K3QF2F20DB_800mhz: lpddr3-timings@800000000 {
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compatible = "jedec,lpddr3-timings";
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reg = <800000000>; /* workaround: it shows max-freq */
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min-freq = <100000000>;
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tRFC = <65000>;
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tRRD = <6000>;
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tRPab = <12000>;
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tRPpb = <12000>;
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tRCD = <10000>;
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tRC = <33750>;
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tRAS = <23000>;
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tWTR = <3750>;
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tWR = <7500>;
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tRTP = <3750>;
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tW2W-C2C = <0>;
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tR2R-C2C = <0>;
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tFAW = <25000>;
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tXSR = <70000>;
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tXP = <3750>;
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tCKE = <3750>;
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tCKESR = <3750>;
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tMRD = <7000>;
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};
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