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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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375f561a41
The CPU hotplug code for the powernv platform currently only puts offline CPUs into nap mode if the powersave_nap variable is set. However, HV-style KVM on this platform requires secondary CPU threads to be offline and in nap mode. Since we know nap mode works just fine on all POWER7 machines, and the only machines that support the powernv platform are POWER7 machines, this changes the code to always put offline CPUs into nap mode, regardless of powersave_nap. Powersave_nap still controls whether or not CPUs go into nap mode when idle, as before. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
174 lines
4.3 KiB
C
174 lines
4.3 KiB
C
/*
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* SMP support for PowerNV machines.
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*
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* Copyright 2011 IBM Corp.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/smp.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/spinlock.h>
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#include <linux/cpu.h>
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#include <asm/irq.h>
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#include <asm/smp.h>
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#include <asm/paca.h>
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#include <asm/machdep.h>
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#include <asm/cputable.h>
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#include <asm/firmware.h>
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#include <asm/rtas.h>
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#include <asm/vdso_datapage.h>
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#include <asm/cputhreads.h>
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#include <asm/xics.h>
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#include <asm/opal.h>
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#include "powernv.h"
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#ifdef DEBUG
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#include <asm/udbg.h>
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#define DBG(fmt...) udbg_printf(fmt)
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#else
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#define DBG(fmt...)
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#endif
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static void __cpuinit pnv_smp_setup_cpu(int cpu)
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{
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if (cpu != boot_cpuid)
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xics_setup_cpu();
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}
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static int pnv_smp_cpu_bootable(unsigned int nr)
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{
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/* Special case - we inhibit secondary thread startup
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* during boot if the user requests it.
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*/
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if (system_state < SYSTEM_RUNNING && cpu_has_feature(CPU_FTR_SMT)) {
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if (!smt_enabled_at_boot && cpu_thread_in_core(nr) != 0)
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return 0;
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if (smt_enabled_at_boot
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&& cpu_thread_in_core(nr) >= smt_enabled_at_boot)
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return 0;
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}
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return 1;
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}
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int __devinit pnv_smp_kick_cpu(int nr)
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{
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unsigned int pcpu = get_hard_smp_processor_id(nr);
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unsigned long start_here = __pa(*((unsigned long *)
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generic_secondary_smp_init));
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long rc;
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BUG_ON(nr < 0 || nr >= NR_CPUS);
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/* On OPAL v2 the CPU are still spinning inside OPAL itself,
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* get them back now
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*/
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if (!paca[nr].cpu_start && firmware_has_feature(FW_FEATURE_OPALv2)) {
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pr_devel("OPAL: Starting CPU %d (HW 0x%x)...\n", nr, pcpu);
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rc = opal_start_cpu(pcpu, start_here);
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if (rc != OPAL_SUCCESS)
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pr_warn("OPAL Error %ld starting CPU %d\n",
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rc, nr);
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}
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return smp_generic_kick_cpu(nr);
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}
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#ifdef CONFIG_HOTPLUG_CPU
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static int pnv_smp_cpu_disable(void)
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{
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int cpu = smp_processor_id();
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/* This is identical to pSeries... might consolidate by
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* moving migrate_irqs_away to a ppc_md with default to
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* the generic fixup_irqs. --BenH.
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*/
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set_cpu_online(cpu, false);
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vdso_data->processorCount--;
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if (cpu == boot_cpuid)
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boot_cpuid = cpumask_any(cpu_online_mask);
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xics_migrate_irqs_away();
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return 0;
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}
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static void pnv_smp_cpu_kill_self(void)
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{
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unsigned int cpu;
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/* Standard hot unplug procedure */
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local_irq_disable();
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idle_task_exit();
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current->active_mm = NULL; /* for sanity */
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cpu = smp_processor_id();
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DBG("CPU%d offline\n", cpu);
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generic_set_cpu_dead(cpu);
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smp_wmb();
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/* We don't want to take decrementer interrupts while we are offline,
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* so clear LPCR:PECE1. We keep PECE2 enabled.
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*/
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mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1);
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while (!generic_check_cpu_restart(cpu)) {
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power7_nap();
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if (!generic_check_cpu_restart(cpu)) {
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DBG("CPU%d Unexpected exit while offline !\n", cpu);
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/* We may be getting an IPI, so we re-enable
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* interrupts to process it, it will be ignored
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* since we aren't online (hopefully)
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*/
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local_irq_enable();
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local_irq_disable();
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}
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}
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mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_PECE1);
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DBG("CPU%d coming online...\n", cpu);
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}
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#endif /* CONFIG_HOTPLUG_CPU */
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static struct smp_ops_t pnv_smp_ops = {
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.message_pass = smp_muxed_ipi_message_pass,
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.cause_ipi = NULL, /* Filled at runtime by xics_smp_probe() */
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.probe = xics_smp_probe,
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.kick_cpu = pnv_smp_kick_cpu,
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.setup_cpu = pnv_smp_setup_cpu,
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.cpu_bootable = pnv_smp_cpu_bootable,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_disable = pnv_smp_cpu_disable,
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.cpu_die = generic_cpu_die,
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#endif /* CONFIG_HOTPLUG_CPU */
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};
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/* This is called very early during platform setup_arch */
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void __init pnv_smp_init(void)
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{
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smp_ops = &pnv_smp_ops;
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/* XXX We don't yet have a proper entry point from HAL, for
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* now we rely on kexec-style entry from BML
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*/
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#ifdef CONFIG_PPC_RTAS
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/* Non-lpar has additional take/give timebase */
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if (rtas_token("freeze-time-base") != RTAS_UNKNOWN_SERVICE) {
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smp_ops->give_timebase = rtas_give_timebase;
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smp_ops->take_timebase = rtas_take_timebase;
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}
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#endif /* CONFIG_PPC_RTAS */
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#ifdef CONFIG_HOTPLUG_CPU
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ppc_md.cpu_die = pnv_smp_cpu_kill_self;
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#endif
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}
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