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af76e806b5
The Oxford Semiconductor OX820 is a ARM11MPcore based SoC sharing some features with the OX810 earlier SoC. This patch adds the core to wake up the second core. Clarifications about Copyrights dates : - hotplug.c was taken from an old versatile code by Ma Haijun and left verbatim - headsmp.S was taken from an old versatile code and adapted by Ma Haijun - platsmp.c is a mix from versatile code, Ma Haijun code and my code for DT Hence the 2002/2003 ARM Coryrights and 2013 Ma Haijun Copyrights. Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
27 lines
693 B
ArmAsm
27 lines
693 B
ArmAsm
/*
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* Copyright (C) 2013 Ma Haijun <mahaijuns@gmail.com>
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* Copyright (c) 2003 ARM Limited
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/linkage.h>
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#include <linux/init.h>
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__INIT
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/*
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* OX820 specific entry point for secondary CPUs.
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*/
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ENTRY(ox820_secondary_startup)
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mov r4, #0
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/* invalidate both caches and branch target cache */
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mcr p15, 0, r4, c7, c7, 0
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/*
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* we've been released from the holding pen: secondary_stack
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* should now contain the SVC stack for this core
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*/
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b secondary_startup
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