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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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2acb037fc4
The Cortina Systems Gemini reset controller is a simple 32bit register with self-deasserting reset lines. It is accessed using regmap over syscon. Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
111 lines
2.7 KiB
C
111 lines
2.7 KiB
C
/*
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* Cortina Gemini Reset controller driver
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* Copyright (C) 2017 Linus Walleij <linus.walleij@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/mfd/syscon.h>
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#include <linux/regmap.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/reset-controller.h>
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#include <dt-bindings/reset/cortina,gemini-reset.h>
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/**
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* struct gemini_reset - gemini reset controller
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* @map: regmap to access the containing system controller
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* @rcdev: reset controller device
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*/
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struct gemini_reset {
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struct regmap *map;
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struct reset_controller_dev rcdev;
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};
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#define GEMINI_GLOBAL_SOFT_RESET 0x0c
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#define to_gemini_reset(p) \
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container_of((p), struct gemini_reset, rcdev)
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/*
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* This is a self-deasserting reset controller.
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*/
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static int gemini_reset(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct gemini_reset *gr = to_gemini_reset(rcdev);
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/* Manual says to always set BIT 30 (CPU1) to 1 */
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return regmap_write(gr->map,
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GEMINI_GLOBAL_SOFT_RESET,
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BIT(GEMINI_RESET_CPU1) | BIT(id));
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}
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static int gemini_reset_status(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct gemini_reset *gr = to_gemini_reset(rcdev);
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u32 val;
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int ret;
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ret = regmap_read(gr->map, GEMINI_GLOBAL_SOFT_RESET, &val);
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if (ret)
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return ret;
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return !!(val & BIT(id));
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}
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static const struct reset_control_ops gemini_reset_ops = {
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.reset = gemini_reset,
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.status = gemini_reset_status,
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};
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static int gemini_reset_probe(struct platform_device *pdev)
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{
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struct gemini_reset *gr;
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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int ret;
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gr = devm_kzalloc(dev, sizeof(*gr), GFP_KERNEL);
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if (!gr)
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return -ENOMEM;
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gr->map = syscon_node_to_regmap(np);
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if (IS_ERR(gr->map)) {
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ret = PTR_ERR(gr->map);
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dev_err(dev, "unable to get regmap (%d)", ret);
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return ret;
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}
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gr->rcdev.owner = THIS_MODULE;
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gr->rcdev.nr_resets = 32;
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gr->rcdev.ops = &gemini_reset_ops;
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gr->rcdev.of_node = pdev->dev.of_node;
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ret = devm_reset_controller_register(&pdev->dev, &gr->rcdev);
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if (ret)
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return ret;
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dev_info(dev, "registered Gemini reset controller\n");
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return 0;
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}
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static const struct of_device_id gemini_reset_dt_ids[] = {
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{ .compatible = "cortina,gemini-syscon", },
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{ /* sentinel */ },
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};
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static struct platform_driver gemini_reset_driver = {
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.probe = gemini_reset_probe,
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.driver = {
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.name = "gemini-reset",
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.of_match_table = gemini_reset_dt_ids,
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.suppress_bind_attrs = true,
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},
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};
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builtin_platform_driver(gemini_reset_driver);
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