mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 23:50:59 +07:00
ea426e6c62
The CPLB implementations (mpu/nompu) had exact copies of the cacheinit code. Even the i/d cache functions are largely the same. So unify them both in the common kernel cache code. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
11 lines
299 B
Makefile
11 lines
299 B
Makefile
#
|
|
# arch/blackfin/kernel/cplb-nompu/Makefile
|
|
#
|
|
|
|
obj-y := cplbinit.o cplbmgr.o
|
|
|
|
CFLAGS_cplbmgr.o := -ffixed-I0 -ffixed-I1 -ffixed-I2 -ffixed-I3 \
|
|
-ffixed-L0 -ffixed-L1 -ffixed-L2 -ffixed-L3 \
|
|
-ffixed-M0 -ffixed-M1 -ffixed-M2 -ffixed-M3 \
|
|
-ffixed-B0 -ffixed-B1 -ffixed-B2 -ffixed-B3
|