linux_dsm_epyc7002/arch/arm/mach-tegra
Marc Zyngier 9a343b9eb8 ARM: tegra: irq: fix buggy usage of irq_data irq field
The crazy gic_arch_extn thing that Tegra uses contains multiple
references to the irq field in struct irq_data, and uses this
to directly poke hardware register.

But irq is the *virtual* irq number, something that has nothing
to do with the actual HW irq (stored in the hwirq field). And once
we put the stacked domain code in action, the whole thing explodes,
as these two values are *very* different:

root@bacon-fat:~# cat /proc/interrupts
            CPU0       CPU1
 16:      25801       2075       GIC  29  twd
 17:          0          0       GIC  73  timer0
112:          0          0      GPIO  58  c8000600.sdhci cd
123:          0          0      GPIO  69  c8000200.sdhci cd
279:       1126          0       GIC 122  serial
281:          0          0       GIC  70  7000c000.i2c
282:          0          0       GIC 116  7000c400.i2c
283:          0          0       GIC 124  7000c500.i2c
284:        300          0       GIC  85  7000d000.i2c
[...]

Just replacing all instances of irq with hwirq fixes the issue.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-27 14:01:55 +01:00
..
board-paz00.c This is the bulk of GPIO changes for the v3.17 development 2014-08-08 18:00:35 -07:00
board.h ARM: tegra: Convert PMC to a driver 2014-07-17 14:58:43 +02:00
common.h Revert "ARM: tegra: add cpu_disable for hotplug" 2013-07-19 10:00:37 -06:00
cpuidle-tegra20.c ARM: tegra: Sort includes alphabetically 2014-07-17 13:29:57 +02:00
cpuidle-tegra30.c ARM: tegra: Sort includes alphabetically 2014-07-17 13:29:57 +02:00
cpuidle-tegra114.c ARM: tegra: Sort includes alphabetically 2014-07-17 13:29:57 +02:00
cpuidle.c ARM: tegra: Use a function to get the chip ID 2014-07-17 13:36:41 +02:00
cpuidle.h ARM: tegra: disable LP2 cpuidle state if PCIe is enabled 2013-08-13 12:07:56 -06:00
flowctrl.c ARM: tegra: Initialize flow controller from DT 2014-08-26 11:43:55 -06:00
flowctrl.h ARM: tegra: Initialize flow controller from DT 2014-08-26 11:43:55 -06:00
headsmp.S ARM: tegra: do v7_invalidate_l1 only when CPU is Cortex-A9 2013-07-19 10:08:04 -06:00
hotplug.c ARM: tegra: Setup CPU hotplug in a pure initcall 2014-07-17 14:58:41 +02:00
io.c ARM: tegra: Sort includes alphabetically 2014-07-17 13:29:57 +02:00
iomap.h ARM: tegra: use section-sized static mappings for LPAE too 2013-12-04 12:25:25 -07:00
irammap.h ARM: tegra: move resume vector define to irammap.h 2013-09-17 13:44:22 -06:00
irq.c ARM: tegra: irq: fix buggy usage of irq_data irq field 2014-11-27 14:01:55 +01:00
irq.h ARM: tegra: irq: add wake up handling 2013-04-03 14:31:32 -06:00
Kconfig ARM: use menuconfig for sub-arch menus 2014-06-17 17:09:48 +02:00
Makefile ARM: tegra: Convert PMC to a driver 2014-07-17 14:58:43 +02:00
platsmp.c ARM: tegra: Convert PMC to a driver 2014-07-17 14:58:43 +02:00
pm-tegra20.c ARM: tegra: Sort includes alphabetically 2014-07-17 13:29:57 +02:00
pm-tegra30.c ARM: tegra: Sort includes alphabetically 2014-07-17 13:29:57 +02:00
pm.c ARM: tegra: Convert PMC to a driver 2014-07-17 14:58:43 +02:00
pm.h ARM: tegra: Convert PMC to a driver 2014-07-17 14:58:43 +02:00
reset-handler.S ARM: tegra: Use a function to get the chip ID 2014-07-17 13:36:41 +02:00
reset.c ARM: tegra: Always lock the CPU reset vector 2014-07-17 14:58:42 +02:00
reset.h ARM: tegra: add common LP1 suspend support 2013-08-12 13:29:24 -06:00
sleep-tegra20.S ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+ 2014-07-18 12:29:04 +01:00
sleep-tegra30.S ARM: SoC cleanups for 3.17 2014-08-08 11:00:26 -07:00
sleep.h ARM: tegra: Setup CPU hotplug in a pure initcall 2014-07-17 14:58:41 +02:00
sleep.S ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+ 2014-07-18 12:29:04 +01:00
tegra.c ARM: tegra: Initialize flow controller from DT 2014-08-26 11:43:55 -06:00