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fe31edc8a3
CONFIG_HOTPLUG is going away as an option. As a result, the __dev* markings need to be removed. This change removes the use of __devinit, __devexit_p, __devinitdata, __devinitconst, and __devexit from these drivers. Based on patches originally written by Bill Pemberton, but redone by me in order to handle some of the coding style issues better, by hand. Cc: Bill Pemberton <wfp5p@virginia.edu> Cc: "David S. Miller" <davem@davemloft.net> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
234 lines
6.3 KiB
C
234 lines
6.3 KiB
C
/*
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* Copyright (C) 1998-2000 Andreas S. Krebs (akrebs@altavista.net), Maintainer
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* Copyright (C) 1998-2002 Andre Hedrick <andre@linux-ide.org>, Integrator
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* Copyright (C) 2007-2011 Bartlomiej Zolnierkiewicz
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*
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* CYPRESS CY82C693 chipset IDE controller
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*
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* The CY82C693 chipset is used on Digital's PC-Alpha 164SX boards.
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/ide.h>
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#include <linux/init.h>
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#include <asm/io.h>
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#define DRV_NAME "cy82c693"
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/*
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* NOTE: the value for busmaster timeout is tricky and I got it by
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* trial and error! By using a to low value will cause DMA timeouts
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* and drop IDE performance, and by using a to high value will cause
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* audio playback to scatter.
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* If you know a better value or how to calc it, please let me know.
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*/
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/* twice the value written in cy82c693ub datasheet */
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#define BUSMASTER_TIMEOUT 0x50
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/*
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* the value above was tested on my machine and it seems to work okay
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*/
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/* here are the offset definitions for the registers */
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#define CY82_IDE_CMDREG 0x04
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#define CY82_IDE_ADDRSETUP 0x48
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#define CY82_IDE_MASTER_IOR 0x4C
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#define CY82_IDE_MASTER_IOW 0x4D
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#define CY82_IDE_SLAVE_IOR 0x4E
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#define CY82_IDE_SLAVE_IOW 0x4F
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#define CY82_IDE_MASTER_8BIT 0x50
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#define CY82_IDE_SLAVE_8BIT 0x51
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#define CY82_INDEX_PORT 0x22
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#define CY82_DATA_PORT 0x23
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#define CY82_INDEX_CHANNEL0 0x30
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#define CY82_INDEX_CHANNEL1 0x31
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#define CY82_INDEX_TIMEOUT 0x32
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/*
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* set DMA mode a specific channel for CY82C693
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*/
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static void cy82c693_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
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{
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const u8 mode = drive->dma_mode;
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u8 single = (mode & 0x10) >> 4, index = 0, data = 0;
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index = hwif->channel ? CY82_INDEX_CHANNEL1 : CY82_INDEX_CHANNEL0;
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data = (mode & 3) | (single << 2);
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outb(index, CY82_INDEX_PORT);
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outb(data, CY82_DATA_PORT);
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/*
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* note: below we set the value for Bus Master IDE TimeOut Register
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* I'm not absolutely sure what this does, but it solved my problem
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* with IDE DMA and sound, so I now can play sound and work with
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* my IDE driver at the same time :-)
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*
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* If you know the correct (best) value for this register please
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* let me know - ASK
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*/
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data = BUSMASTER_TIMEOUT;
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outb(CY82_INDEX_TIMEOUT, CY82_INDEX_PORT);
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outb(data, CY82_DATA_PORT);
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}
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static void cy82c693_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
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{
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
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const unsigned long T = 1000000 / bus_speed;
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unsigned int addrCtrl;
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struct ide_timing t;
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u8 time_16, time_8;
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/* select primary or secondary channel */
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if (drive->dn > 1) { /* drive is on the secondary channel */
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dev = pci_get_slot(dev->bus, dev->devfn+1);
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if (!dev) {
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printk(KERN_ERR "%s: tune_drive: "
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"Cannot find secondary interface!\n",
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drive->name);
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return;
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}
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}
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ide_timing_compute(drive, drive->pio_mode, &t, T, 1);
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time_16 = clamp_val(t.recover - 1, 0, 15) |
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(clamp_val(t.active - 1, 0, 15) << 4);
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time_8 = clamp_val(t.act8b - 1, 0, 15) |
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(clamp_val(t.rec8b - 1, 0, 15) << 4);
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/* now let's write the clocks registers */
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if ((drive->dn & 1) == 0) {
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/*
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* set master drive
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* address setup control register
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* is 32 bit !!!
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*/
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pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
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addrCtrl &= (~0xF);
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addrCtrl |= clamp_val(t.setup - 1, 0, 15);
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pci_write_config_dword(dev, CY82_IDE_ADDRSETUP, addrCtrl);
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/* now let's set the remaining registers */
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pci_write_config_byte(dev, CY82_IDE_MASTER_IOR, time_16);
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pci_write_config_byte(dev, CY82_IDE_MASTER_IOW, time_16);
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pci_write_config_byte(dev, CY82_IDE_MASTER_8BIT, time_8);
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} else {
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/*
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* set slave drive
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* address setup control register
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* is 32 bit !!!
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*/
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pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
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addrCtrl &= (~0xF0);
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addrCtrl |= (clamp_val(t.setup - 1, 0, 15) << 4);
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pci_write_config_dword(dev, CY82_IDE_ADDRSETUP, addrCtrl);
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/* now let's set the remaining registers */
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pci_write_config_byte(dev, CY82_IDE_SLAVE_IOR, time_16);
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pci_write_config_byte(dev, CY82_IDE_SLAVE_IOW, time_16);
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pci_write_config_byte(dev, CY82_IDE_SLAVE_8BIT, time_8);
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}
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if (drive->dn > 1)
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pci_dev_put(dev);
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}
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static void init_iops_cy82c693(ide_hwif_t *hwif)
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{
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static ide_hwif_t *primary;
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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if (PCI_FUNC(dev->devfn) == 1)
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primary = hwif;
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else {
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hwif->mate = primary;
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hwif->channel = 1;
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}
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}
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static const struct ide_port_ops cy82c693_port_ops = {
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.set_pio_mode = cy82c693_set_pio_mode,
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.set_dma_mode = cy82c693_set_dma_mode,
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};
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static const struct ide_port_info cy82c693_chipset = {
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.name = DRV_NAME,
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.init_iops = init_iops_cy82c693,
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.port_ops = &cy82c693_port_ops,
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.host_flags = IDE_HFLAG_SINGLE,
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.pio_mask = ATA_PIO4,
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.swdma_mask = ATA_SWDMA2,
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.mwdma_mask = ATA_MWDMA2,
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};
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static int cy82c693_init_one(struct pci_dev *dev,
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const struct pci_device_id *id)
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{
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struct pci_dev *dev2;
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int ret = -ENODEV;
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/* CY82C693 is more than only a IDE controller.
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Function 1 is primary IDE channel, function 2 - secondary. */
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if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE &&
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PCI_FUNC(dev->devfn) == 1) {
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dev2 = pci_get_slot(dev->bus, dev->devfn + 1);
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ret = ide_pci_init_two(dev, dev2, &cy82c693_chipset, NULL);
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if (ret)
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pci_dev_put(dev2);
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}
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return ret;
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}
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static void cy82c693_remove(struct pci_dev *dev)
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{
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struct ide_host *host = pci_get_drvdata(dev);
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struct pci_dev *dev2 = host->dev[1] ? to_pci_dev(host->dev[1]) : NULL;
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ide_pci_remove(dev);
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pci_dev_put(dev2);
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}
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static const struct pci_device_id cy82c693_pci_tbl[] = {
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{ PCI_VDEVICE(CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693), 0 },
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{ 0, },
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};
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MODULE_DEVICE_TABLE(pci, cy82c693_pci_tbl);
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static struct pci_driver cy82c693_pci_driver = {
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.name = "Cypress_IDE",
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.id_table = cy82c693_pci_tbl,
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.probe = cy82c693_init_one,
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.remove = cy82c693_remove,
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.suspend = ide_pci_suspend,
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.resume = ide_pci_resume,
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};
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static int __init cy82c693_ide_init(void)
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{
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return ide_pci_register_driver(&cy82c693_pci_driver);
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}
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static void __exit cy82c693_ide_exit(void)
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{
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pci_unregister_driver(&cy82c693_pci_driver);
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}
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module_init(cy82c693_ide_init);
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module_exit(cy82c693_ide_exit);
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MODULE_AUTHOR("Andreas Krebs, Andre Hedrick, Bartlomiej Zolnierkiewicz");
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MODULE_DESCRIPTION("PCI driver module for the Cypress CY82C693 IDE");
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MODULE_LICENSE("GPL");
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