mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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24f9aacfb0
monitor xgmi errors via mc pie status through fica registers. Signed-off-by: Jonathan Kim <Jonathan.Kim@amd.com> Reviewed-by: Kent Russell <Kent.Russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
440 lines
12 KiB
C
440 lines
12 KiB
C
/*
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* Copyright 2018 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*
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*/
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#include <linux/list.h>
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#include "amdgpu.h"
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#include "amdgpu_xgmi.h"
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#include "amdgpu_smu.h"
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#include "df/df_3_6_offset.h"
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static DEFINE_MUTEX(xgmi_mutex);
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#define AMDGPU_MAX_XGMI_HIVE 8
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#define AMDGPU_MAX_XGMI_DEVICE_PER_HIVE 4
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static struct amdgpu_hive_info xgmi_hives[AMDGPU_MAX_XGMI_HIVE];
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static unsigned hive_count = 0;
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void *amdgpu_xgmi_hive_try_lock(struct amdgpu_hive_info *hive)
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{
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return &hive->device_list;
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}
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/**
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* DOC: AMDGPU XGMI Support
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*
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* XGMI is a high speed interconnect that joins multiple GPU cards
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* into a homogeneous memory space that is organized by a collective
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* hive ID and individual node IDs, both of which are 64-bit numbers.
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*
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* The file xgmi_device_id contains the unique per GPU device ID and
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* is stored in the /sys/class/drm/card${cardno}/device/ directory.
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*
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* Inside the device directory a sub-directory 'xgmi_hive_info' is
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* created which contains the hive ID and the list of nodes.
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*
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* The hive ID is stored in:
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* /sys/class/drm/card${cardno}/device/xgmi_hive_info/xgmi_hive_id
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*
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* The node information is stored in numbered directories:
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* /sys/class/drm/card${cardno}/device/xgmi_hive_info/node${nodeno}/xgmi_device_id
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*
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* Each device has their own xgmi_hive_info direction with a mirror
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* set of node sub-directories.
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*
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* The XGMI memory space is built by contiguously adding the power of
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* two padded VRAM space from each node to each other.
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*
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*/
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static ssize_t amdgpu_xgmi_show_hive_id(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct amdgpu_hive_info *hive =
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container_of(attr, struct amdgpu_hive_info, dev_attr);
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return snprintf(buf, PAGE_SIZE, "%llu\n", hive->hive_id);
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}
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static int amdgpu_xgmi_sysfs_create(struct amdgpu_device *adev,
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struct amdgpu_hive_info *hive)
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{
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int ret = 0;
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if (WARN_ON(hive->kobj))
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return -EINVAL;
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hive->kobj = kobject_create_and_add("xgmi_hive_info", &adev->dev->kobj);
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if (!hive->kobj) {
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dev_err(adev->dev, "XGMI: Failed to allocate sysfs entry!\n");
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return -EINVAL;
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}
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hive->dev_attr = (struct device_attribute) {
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.attr = {
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.name = "xgmi_hive_id",
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.mode = S_IRUGO,
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},
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.show = amdgpu_xgmi_show_hive_id,
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};
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ret = sysfs_create_file(hive->kobj, &hive->dev_attr.attr);
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if (ret) {
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dev_err(adev->dev, "XGMI: Failed to create device file xgmi_hive_id\n");
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kobject_del(hive->kobj);
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kobject_put(hive->kobj);
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hive->kobj = NULL;
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}
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return ret;
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}
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static void amdgpu_xgmi_sysfs_destroy(struct amdgpu_device *adev,
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struct amdgpu_hive_info *hive)
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{
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sysfs_remove_file(hive->kobj, &hive->dev_attr.attr);
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kobject_del(hive->kobj);
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kobject_put(hive->kobj);
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hive->kobj = NULL;
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}
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static ssize_t amdgpu_xgmi_show_device_id(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct drm_device *ddev = dev_get_drvdata(dev);
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struct amdgpu_device *adev = ddev->dev_private;
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return snprintf(buf, PAGE_SIZE, "%llu\n", adev->gmc.xgmi.node_id);
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}
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#define AMDGPU_XGMI_SET_FICAA(o) ((o) | 0x456801)
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static ssize_t amdgpu_xgmi_show_error(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct drm_device *ddev = dev_get_drvdata(dev);
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struct amdgpu_device *adev = ddev->dev_private;
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uint32_t ficaa_pie_ctl_in, ficaa_pie_status_in;
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uint64_t fica_out;
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unsigned int error_count = 0;
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ficaa_pie_ctl_in = AMDGPU_XGMI_SET_FICAA(0x200);
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ficaa_pie_status_in = AMDGPU_XGMI_SET_FICAA(0x208);
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fica_out = adev->df_funcs->get_fica(adev, ficaa_pie_ctl_in);
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if (fica_out != 0x1f)
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pr_err("xGMI error counters not enabled!\n");
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fica_out = adev->df_funcs->get_fica(adev, ficaa_pie_status_in);
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if ((fica_out & 0xffff) == 2)
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error_count = ((fica_out >> 62) & 0x1) + (fica_out >> 63);
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adev->df_funcs->set_fica(adev, ficaa_pie_status_in, 0, 0);
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return snprintf(buf, PAGE_SIZE, "%d\n", error_count);
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}
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static DEVICE_ATTR(xgmi_device_id, S_IRUGO, amdgpu_xgmi_show_device_id, NULL);
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static DEVICE_ATTR(xgmi_error, S_IRUGO, amdgpu_xgmi_show_error, NULL);
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static int amdgpu_xgmi_sysfs_add_dev_info(struct amdgpu_device *adev,
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struct amdgpu_hive_info *hive)
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{
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int ret = 0;
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char node[10] = { 0 };
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/* Create xgmi device id file */
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ret = device_create_file(adev->dev, &dev_attr_xgmi_device_id);
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if (ret) {
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dev_err(adev->dev, "XGMI: Failed to create device file xgmi_device_id\n");
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return ret;
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}
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/* Create xgmi error file */
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ret = device_create_file(adev->dev, &dev_attr_xgmi_error);
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if (ret)
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pr_err("failed to create xgmi_error\n");
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/* Create sysfs link to hive info folder on the first device */
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if (adev != hive->adev) {
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ret = sysfs_create_link(&adev->dev->kobj, hive->kobj,
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"xgmi_hive_info");
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if (ret) {
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dev_err(adev->dev, "XGMI: Failed to create link to hive info");
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goto remove_file;
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}
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}
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sprintf(node, "node%d", hive->number_devices);
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/* Create sysfs link form the hive folder to yourself */
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ret = sysfs_create_link(hive->kobj, &adev->dev->kobj, node);
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if (ret) {
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dev_err(adev->dev, "XGMI: Failed to create link from hive info");
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goto remove_link;
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}
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goto success;
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remove_link:
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sysfs_remove_link(&adev->dev->kobj, adev->ddev->unique);
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remove_file:
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device_remove_file(adev->dev, &dev_attr_xgmi_device_id);
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success:
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return ret;
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}
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static void amdgpu_xgmi_sysfs_rem_dev_info(struct amdgpu_device *adev,
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struct amdgpu_hive_info *hive)
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{
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device_remove_file(adev->dev, &dev_attr_xgmi_device_id);
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sysfs_remove_link(&adev->dev->kobj, adev->ddev->unique);
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sysfs_remove_link(hive->kobj, adev->ddev->unique);
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}
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struct amdgpu_hive_info *amdgpu_get_xgmi_hive(struct amdgpu_device *adev, int lock)
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{
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int i;
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struct amdgpu_hive_info *tmp;
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if (!adev->gmc.xgmi.hive_id)
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return NULL;
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mutex_lock(&xgmi_mutex);
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for (i = 0 ; i < hive_count; ++i) {
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tmp = &xgmi_hives[i];
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if (tmp->hive_id == adev->gmc.xgmi.hive_id) {
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if (lock)
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mutex_lock(&tmp->hive_lock);
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mutex_unlock(&xgmi_mutex);
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return tmp;
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}
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}
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if (i >= AMDGPU_MAX_XGMI_HIVE) {
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mutex_unlock(&xgmi_mutex);
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return NULL;
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}
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/* initialize new hive if not exist */
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tmp = &xgmi_hives[hive_count++];
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if (amdgpu_xgmi_sysfs_create(adev, tmp)) {
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mutex_unlock(&xgmi_mutex);
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return NULL;
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}
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tmp->adev = adev;
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tmp->hive_id = adev->gmc.xgmi.hive_id;
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INIT_LIST_HEAD(&tmp->device_list);
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mutex_init(&tmp->hive_lock);
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mutex_init(&tmp->reset_lock);
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if (lock)
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mutex_lock(&tmp->hive_lock);
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tmp->pstate = -1;
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mutex_unlock(&xgmi_mutex);
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return tmp;
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}
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int amdgpu_xgmi_set_pstate(struct amdgpu_device *adev, int pstate)
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{
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int ret = 0;
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struct amdgpu_hive_info *hive = amdgpu_get_xgmi_hive(adev, 0);
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if (!hive)
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return 0;
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if (hive->pstate == pstate)
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return 0;
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dev_dbg(adev->dev, "Set xgmi pstate %d.\n", pstate);
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if (is_support_sw_smu_xgmi(adev))
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ret = smu_set_xgmi_pstate(&adev->smu, pstate);
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if (ret)
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dev_err(adev->dev,
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"XGMI: Set pstate failure on device %llx, hive %llx, ret %d",
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adev->gmc.xgmi.node_id,
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adev->gmc.xgmi.hive_id, ret);
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return ret;
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}
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int amdgpu_xgmi_update_topology(struct amdgpu_hive_info *hive, struct amdgpu_device *adev)
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{
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int ret = -EINVAL;
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/* Each psp need to set the latest topology */
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ret = psp_xgmi_set_topology_info(&adev->psp,
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hive->number_devices,
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&adev->psp.xgmi_context.top_info);
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if (ret)
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dev_err(adev->dev,
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"XGMI: Set topology failure on device %llx, hive %llx, ret %d",
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adev->gmc.xgmi.node_id,
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adev->gmc.xgmi.hive_id, ret);
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return ret;
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}
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int amdgpu_xgmi_get_hops_count(struct amdgpu_device *adev,
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struct amdgpu_device *peer_adev)
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{
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struct psp_xgmi_topology_info *top = &adev->psp.xgmi_context.top_info;
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int i;
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for (i = 0 ; i < top->num_nodes; ++i)
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if (top->nodes[i].node_id == peer_adev->gmc.xgmi.node_id)
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return top->nodes[i].num_hops;
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return -EINVAL;
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}
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int amdgpu_xgmi_add_device(struct amdgpu_device *adev)
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{
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struct psp_xgmi_topology_info *top_info;
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struct amdgpu_hive_info *hive;
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struct amdgpu_xgmi *entry;
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struct amdgpu_device *tmp_adev = NULL;
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int count = 0, ret = 0;
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if (!adev->gmc.xgmi.supported)
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return 0;
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if (amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_PSP)) {
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ret = psp_xgmi_get_hive_id(&adev->psp, &adev->gmc.xgmi.hive_id);
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if (ret) {
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dev_err(adev->dev,
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"XGMI: Failed to get hive id\n");
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return ret;
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}
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ret = psp_xgmi_get_node_id(&adev->psp, &adev->gmc.xgmi.node_id);
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if (ret) {
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dev_err(adev->dev,
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"XGMI: Failed to get node id\n");
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return ret;
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}
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} else {
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adev->gmc.xgmi.hive_id = 16;
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adev->gmc.xgmi.node_id = adev->gmc.xgmi.physical_node_id + 16;
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}
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hive = amdgpu_get_xgmi_hive(adev, 1);
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if (!hive) {
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ret = -EINVAL;
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dev_err(adev->dev,
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"XGMI: node 0x%llx, can not match hive 0x%llx in the hive list.\n",
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adev->gmc.xgmi.node_id, adev->gmc.xgmi.hive_id);
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goto exit;
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}
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top_info = &adev->psp.xgmi_context.top_info;
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list_add_tail(&adev->gmc.xgmi.head, &hive->device_list);
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list_for_each_entry(entry, &hive->device_list, head)
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top_info->nodes[count++].node_id = entry->node_id;
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top_info->num_nodes = count;
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hive->number_devices = count;
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if (amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_PSP)) {
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list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) {
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/* update node list for other device in the hive */
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if (tmp_adev != adev) {
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top_info = &tmp_adev->psp.xgmi_context.top_info;
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top_info->nodes[count - 1].node_id =
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adev->gmc.xgmi.node_id;
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top_info->num_nodes = count;
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}
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ret = amdgpu_xgmi_update_topology(hive, tmp_adev);
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if (ret)
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goto exit;
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}
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/* get latest topology info for each device from psp */
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list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) {
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ret = psp_xgmi_get_topology_info(&tmp_adev->psp, count,
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&tmp_adev->psp.xgmi_context.top_info);
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if (ret) {
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dev_err(tmp_adev->dev,
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"XGMI: Get topology failure on device %llx, hive %llx, ret %d",
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tmp_adev->gmc.xgmi.node_id,
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tmp_adev->gmc.xgmi.hive_id, ret);
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/* To do : continue with some node failed or disable the whole hive */
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goto exit;
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}
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}
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}
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if (!ret)
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ret = amdgpu_xgmi_sysfs_add_dev_info(adev, hive);
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mutex_unlock(&hive->hive_lock);
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exit:
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if (!ret)
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dev_info(adev->dev, "XGMI: Add node %d, hive 0x%llx.\n",
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adev->gmc.xgmi.physical_node_id, adev->gmc.xgmi.hive_id);
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else
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dev_err(adev->dev, "XGMI: Failed to add node %d, hive 0x%llx ret: %d\n",
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adev->gmc.xgmi.physical_node_id, adev->gmc.xgmi.hive_id,
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ret);
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return ret;
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}
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void amdgpu_xgmi_remove_device(struct amdgpu_device *adev)
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{
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struct amdgpu_hive_info *hive;
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if (!adev->gmc.xgmi.supported)
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return;
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hive = amdgpu_get_xgmi_hive(adev, 1);
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if (!hive)
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return;
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if (!(hive->number_devices--)) {
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amdgpu_xgmi_sysfs_destroy(adev, hive);
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mutex_destroy(&hive->hive_lock);
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mutex_destroy(&hive->reset_lock);
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} else {
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amdgpu_xgmi_sysfs_rem_dev_info(adev, hive);
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mutex_unlock(&hive->hive_lock);
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}
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}
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