mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-01-17 02:46:47 +07:00
b5a65c4063
This patch adds P3 in U2 SS inactive quirk, and some special platforms can configure that if it is needed. [ balbi@ti.com : added DeviceTree binding documentation ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
33 lines
1.2 KiB
Plaintext
33 lines
1.2 KiB
Plaintext
synopsys DWC3 CORE
|
|
|
|
DWC3- USB3 CONTROLLER
|
|
|
|
Required properties:
|
|
- compatible: must be "snps,dwc3"
|
|
- reg : Address and length of the register set for the device
|
|
- interrupts: Interrupts used by the dwc3 controller.
|
|
|
|
Optional properties:
|
|
- usb-phy : array of phandle for the PHY device. The first element
|
|
in the array is expected to be a handle to the USB2/HS PHY and
|
|
the second element is expected to be a handle to the USB3/SS PHY
|
|
- phys: from the *Generic PHY* bindings
|
|
- phy-names: from the *Generic PHY* bindings
|
|
- tx-fifo-resize: determines if the FIFO *has* to be reallocated.
|
|
- snps,disable_scramble_quirk: true when SW should disable data scrambling.
|
|
Only really useful for FPGA builds.
|
|
- snps,has-lpm-erratum: true when DWC3 was configured with LPM Erratum enabled
|
|
- snps,lpm-nyet-threshold: LPM NYET threshold
|
|
- snps,u2exit_lfps_quirk: set if we want to enable u2exit lfps quirk
|
|
- snps,u2ss_inp3_quirk: set if we enable P3 OK for U2/SS Inactive quirk
|
|
|
|
This is usually a subnode to DWC3 glue to which it is connected.
|
|
|
|
dwc3@4a030000 {
|
|
compatible = "snps,dwc3";
|
|
reg = <0x4a030000 0xcfff>;
|
|
interrupts = <0 92 4>
|
|
usb-phy = <&usb2_phy>, <&usb3,phy>;
|
|
tx-fifo-resize;
|
|
};
|