mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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eb3d3ec567
Pull ARM updates from Russell King: - Major clean-up of the L2 cache support code. The existing mess was becoming rather unmaintainable through all the additions that others have done over time. This turns it into a much nicer structure, and implements a few performance improvements as well. - Clean up some of the CP15 control register tweaks for alignment support, moving some code and data into alignment.c - DMA properties for ARM, from Santosh and reviewed by DT people. This adds DT properties to specify bus translations we can't discover automatically, and to indicate whether devices are coherent. - Hibernation support for ARM - Make ftrace work with read-only text in modules - add suspend support for PJ4B CPUs - rework interrupt masking for undefined instruction handling, which allows us to enable interrupts earlier in the handling of these exceptions. - support for big endian page tables - fix stacktrace support to exclude stacktrace functions from the trace, and add save_stack_trace_regs() implementation so that kprobes can record stack traces. - Add support for the Cortex-A17 CPU. - Remove last vestiges of ARM710 support. - Removal of ARM "meminfo" structure, finally converting us solely to memblock to handle the early memory initialisation. * 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (142 commits) ARM: ensure C page table setup code follows assembly code (part II) ARM: ensure C page table setup code follows assembly code ARM: consolidate last remaining open-coded alignment trap enable ARM: remove global cr_no_alignment ARM: remove CPU_CP15 conditional from alignment.c ARM: remove unused adjust_cr() function ARM: move "noalign" command line option to alignment.c ARM: provide common method to clear bits in CPU control register ARM: 8025/1: Get rid of meminfo ARM: 8060/1: mm: allow sub-architectures to override PCI I/O memory type ARM: 8066/1: correction for ARM patch 8031/2 ARM: 8049/1: ftrace/add save_stack_trace_regs() implementation ARM: 8065/1: remove last use of CONFIG_CPU_ARM710 ARM: 8062/1: Modify ldrt fixup handler to re-execute the userspace instruction ARM: 8047/1: rwsem: use asm-generic rwsem implementation ARM: l2c: trial at enabling some Cortex-A9 optimisations ARM: l2c: add warnings for stuff modifying aux_ctrl register values ARM: l2c: print a warning with L2C-310 caches if the cache size is modified ARM: l2c: remove old .set_debug method ARM: l2c: kill L2X0_AUX_CTRL_MASK before anyone else makes use of this ...
171 lines
3.6 KiB
C
171 lines
3.6 KiB
C
/* linux/arch/arm/mach-s3c2412/mach-vstms.c
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*
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* (C) 2006 Thomas Gleixner <tglx@linutronix.de>
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*
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* Derived from mach-smdk2413.c - (C) 2006 Simtec Electronics
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/timer.h>
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#include <linux/init.h>
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#include <linux/serial_core.h>
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#include <linux/serial_s3c.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/nand_ecc.h>
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#include <linux/mtd/partitions.h>
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#include <linux/memblock.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/irq.h>
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#include <mach/hardware.h>
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#include <asm/setup.h>
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#include <asm/irq.h>
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#include <asm/mach-types.h>
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#include <mach/regs-gpio.h>
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#include <mach/regs-lcd.h>
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#include <mach/fb.h>
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#include <linux/platform_data/i2c-s3c2410.h>
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#include <linux/platform_data/mtd-nand-s3c2410.h>
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#include <plat/clock.h>
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#include <plat/devs.h>
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#include <plat/cpu.h>
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#include <plat/samsung-time.h>
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#include "common.h"
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static struct map_desc vstms_iodesc[] __initdata = {
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};
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static struct s3c2410_uartcfg vstms_uartcfgs[] __initdata = {
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[0] = {
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.hwport = 0,
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.flags = 0,
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.ucon = 0x3c5,
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.ulcon = 0x03,
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.ufcon = 0x51,
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},
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[1] = {
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.hwport = 1,
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.flags = 0,
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.ucon = 0x3c5,
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.ulcon = 0x03,
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.ufcon = 0x51,
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},
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[2] = {
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.hwport = 2,
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.flags = 0,
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.ucon = 0x3c5,
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.ulcon = 0x03,
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.ufcon = 0x51,
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}
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};
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static struct mtd_partition __initdata vstms_nand_part[] = {
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[0] = {
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.name = "Boot Agent",
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.size = 0x7C000,
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.offset = 0,
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},
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[1] = {
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.name = "UBoot Config",
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.offset = 0x7C000,
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.size = 0x4000,
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},
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[2] = {
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.name = "Kernel",
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.offset = 0x80000,
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.size = 0x200000,
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},
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[3] = {
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.name = "RFS",
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.offset = 0x280000,
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.size = 0x3d80000,
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},
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};
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static struct s3c2410_nand_set __initdata vstms_nand_sets[] = {
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[0] = {
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.name = "NAND",
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.nr_chips = 1,
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.nr_partitions = ARRAY_SIZE(vstms_nand_part),
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.partitions = vstms_nand_part,
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},
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};
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/* choose a set of timings which should suit most 512Mbit
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* chips and beyond.
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*/
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static struct s3c2410_platform_nand __initdata vstms_nand_info = {
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.tacls = 20,
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.twrph0 = 60,
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.twrph1 = 20,
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.nr_sets = ARRAY_SIZE(vstms_nand_sets),
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.sets = vstms_nand_sets,
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};
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static struct platform_device *vstms_devices[] __initdata = {
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&s3c_device_ohci,
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&s3c_device_wdt,
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&s3c_device_i2c0,
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&s3c_device_iis,
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&s3c_device_rtc,
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&s3c_device_nand,
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&s3c2412_device_dma,
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};
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static void __init vstms_fixup(struct tag *tags, char **cmdline)
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{
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if (tags != phys_to_virt(S3C2410_SDRAM_PA + 0x100)) {
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memblock_add(0x30000000, SZ_64M);
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}
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}
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static void __init vstms_map_io(void)
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{
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s3c24xx_init_io(vstms_iodesc, ARRAY_SIZE(vstms_iodesc));
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s3c24xx_init_uarts(vstms_uartcfgs, ARRAY_SIZE(vstms_uartcfgs));
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samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
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}
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static void __init vstms_init_time(void)
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{
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s3c2412_init_clocks(12000000);
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samsung_timer_init();
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}
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static void __init vstms_init(void)
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{
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s3c_i2c0_set_platdata(NULL);
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s3c_nand_set_platdata(&vstms_nand_info);
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platform_add_devices(vstms_devices, ARRAY_SIZE(vstms_devices));
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}
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MACHINE_START(VSTMS, "VSTMS")
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.atag_offset = 0x100,
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.fixup = vstms_fixup,
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.init_irq = s3c2412_init_irq,
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.init_machine = vstms_init,
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.map_io = vstms_map_io,
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.init_time = vstms_init_time,
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.restart = s3c2412_restart,
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MACHINE_END
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