Ido Schimmel 1e81779ae4 mlxsw: Make mailboxes 4KB aligned ... The HW-SW contract requires mailboxes passed to the firmware to be 4KB aligned. Previously, these mailboxes were mapped using streaming DMA routines, which do not guarantee the bus addresses to be 4KB aligned. Under certain conditions this constraint was indeed violated and errors were observed. By using consistent DMA mapping routines together with a mailbox size of 4KB we are guaranteed not to violate the constraint. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>		2015-08-27 16:31:17 -07:00
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cmd.h	mlxsw: Introduce Mellanox switch driver core	2015-07-30 00:04:59 -07:00
core.c	mlxsw: adjust transmit fail log message level in __mlxsw_emad_transmit	2015-08-27 16:31:17 -07:00
core.h	mlxsw: Simplify mlxsw_sx_port_xmit function	2015-08-09 22:54:10 -07:00
emad.h	mlxsw: Add interface to access registers and process events	2015-07-30 00:05:00 -07:00
item.h	mellanox: mlxsw: Use '%zx' to print size_t format	2015-08-10 21:12:49 -07:00
Kconfig	mlxsw: Make pci module dependent on HAS_DMA and HAS_IOMEM	2015-08-09 22:54:09 -07:00
Makefile	mlxsw: Introduce Mellanox SwitchX-2 ASIC support	2015-07-30 00:05:00 -07:00
pci.c	mlxsw: Make mailboxes 4KB aligned	2015-08-27 16:31:17 -07:00
pci.h	mlxsw: Strip FCS from incoming packets	2015-08-09 22:54:10 -07:00
port.h	mlxsw: Introduce Mellanox SwitchX-2 ASIC support	2015-07-30 00:05:00 -07:00
reg.h	mlxsw: Make system port to local port mapping explicit	2015-08-09 22:54:09 -07:00
switchx2.c	mlxsw: Fix use-after-free bug in mlxsw_sx_port_xmit	2015-08-09 22:54:10 -07:00
trap.h	mlxsw: Introduce Mellanox switch driver core	2015-07-30 00:04:59 -07:00
txheader.h	mlxsw: Introduce Mellanox SwitchX-2 ASIC support	2015-07-30 00:05:00 -07:00