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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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66441bd3cf
In line with asm/e820/types.h, move the e820 API declarations to asm/e820/api.h and update all usage sites. This is just a mechanical, obviously correct move & replace patch, there will be subsequent changes to clean up the code and to make better use of the new header organization. Cc: Alex Thorlton <athorlton@sgi.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Huang, Ying <ying.huang@intel.com> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Juergen Gross <jgross@suse.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Paul Jackson <pj@sgi.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Rafael J. Wysocki <rjw@sisk.pl> Cc: Tejun Heo <tj@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Wei Yang <richard.weiyang@gmail.com> Cc: Yinghai Lu <yinghai@kernel.org> Cc: linux-kernel@vger.kernel.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
184 lines
3.9 KiB
C
184 lines
3.9 KiB
C
/*
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* AMD NUMA support.
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* Discover the memory map and associated nodes.
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*
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* This version reads it directly from the AMD northbridge.
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*
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* Copyright 2002,2003 Andi Kleen, SuSE Labs.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/string.h>
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#include <linux/nodemask.h>
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#include <linux/memblock.h>
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#include <linux/bootmem.h>
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#include <asm/io.h>
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#include <linux/pci_ids.h>
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#include <linux/acpi.h>
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#include <asm/types.h>
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#include <asm/mmzone.h>
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#include <asm/proto.h>
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#include <asm/e820/api.h>
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#include <asm/pci-direct.h>
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#include <asm/numa.h>
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#include <asm/mpspec.h>
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#include <asm/apic.h>
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#include <asm/amd_nb.h>
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static unsigned char __initdata nodeids[8];
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static __init int find_northbridge(void)
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{
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int num;
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for (num = 0; num < 32; num++) {
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u32 header;
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header = read_pci_config(0, num, 0, 0x00);
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if (header != (PCI_VENDOR_ID_AMD | (0x1100<<16)) &&
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header != (PCI_VENDOR_ID_AMD | (0x1200<<16)) &&
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header != (PCI_VENDOR_ID_AMD | (0x1300<<16)))
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continue;
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header = read_pci_config(0, num, 1, 0x00);
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if (header != (PCI_VENDOR_ID_AMD | (0x1101<<16)) &&
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header != (PCI_VENDOR_ID_AMD | (0x1201<<16)) &&
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header != (PCI_VENDOR_ID_AMD | (0x1301<<16)))
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continue;
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return num;
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}
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return -ENOENT;
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}
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int __init amd_numa_init(void)
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{
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u64 start = PFN_PHYS(0);
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u64 end = PFN_PHYS(max_pfn);
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unsigned numnodes;
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u64 prevbase;
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int i, j, nb;
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u32 nodeid, reg;
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unsigned int bits, cores, apicid_base;
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if (!early_pci_allowed())
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return -EINVAL;
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nb = find_northbridge();
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if (nb < 0)
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return nb;
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pr_info("Scanning NUMA topology in Northbridge %d\n", nb);
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reg = read_pci_config(0, nb, 0, 0x60);
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numnodes = ((reg >> 4) & 0xF) + 1;
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if (numnodes <= 1)
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return -ENOENT;
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pr_info("Number of physical nodes %d\n", numnodes);
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prevbase = 0;
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for (i = 0; i < 8; i++) {
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u64 base, limit;
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base = read_pci_config(0, nb, 1, 0x40 + i*8);
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limit = read_pci_config(0, nb, 1, 0x44 + i*8);
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nodeids[i] = nodeid = limit & 7;
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if ((base & 3) == 0) {
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if (i < numnodes)
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pr_info("Skipping disabled node %d\n", i);
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continue;
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}
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if (nodeid >= numnodes) {
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pr_info("Ignoring excess node %d (%Lx:%Lx)\n", nodeid,
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base, limit);
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continue;
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}
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if (!limit) {
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pr_info("Skipping node entry %d (base %Lx)\n",
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i, base);
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continue;
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}
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if ((base >> 8) & 3 || (limit >> 8) & 3) {
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pr_err("Node %d using interleaving mode %Lx/%Lx\n",
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nodeid, (base >> 8) & 3, (limit >> 8) & 3);
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return -EINVAL;
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}
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if (node_isset(nodeid, numa_nodes_parsed)) {
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pr_info("Node %d already present, skipping\n",
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nodeid);
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continue;
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}
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limit >>= 16;
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limit++;
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limit <<= 24;
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if (limit > end)
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limit = end;
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if (limit <= base)
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continue;
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base >>= 16;
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base <<= 24;
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if (base < start)
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base = start;
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if (limit > end)
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limit = end;
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if (limit == base) {
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pr_err("Empty node %d\n", nodeid);
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continue;
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}
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if (limit < base) {
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pr_err("Node %d bogus settings %Lx-%Lx.\n",
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nodeid, base, limit);
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continue;
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}
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/* Could sort here, but pun for now. Should not happen anyroads. */
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if (prevbase > base) {
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pr_err("Node map not sorted %Lx,%Lx\n",
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prevbase, base);
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return -EINVAL;
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}
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pr_info("Node %d MemBase %016Lx Limit %016Lx\n",
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nodeid, base, limit);
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prevbase = base;
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numa_add_memblk(nodeid, base, limit);
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node_set(nodeid, numa_nodes_parsed);
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}
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if (!nodes_weight(numa_nodes_parsed))
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return -ENOENT;
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/*
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* We seem to have valid NUMA configuration. Map apicids to nodes
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* using the coreid bits from early_identify_cpu.
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*/
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bits = boot_cpu_data.x86_coreid_bits;
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cores = 1 << bits;
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apicid_base = 0;
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/*
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* get boot-time SMP configuration:
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*/
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early_get_smp_config();
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if (boot_cpu_physical_apicid > 0) {
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pr_info("BSP APIC ID: %02x\n", boot_cpu_physical_apicid);
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apicid_base = boot_cpu_physical_apicid;
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}
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for_each_node_mask(i, numa_nodes_parsed)
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for (j = apicid_base; j < cores + apicid_base; j++)
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set_apicid_to_node((i << bits) + j, i);
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return 0;
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}
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