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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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fe681d2941
Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
71 lines
1.3 KiB
Plaintext
71 lines
1.3 KiB
Plaintext
/*
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* Device Tree Source for the EMEV2 SoC
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*
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* Copyright (C) 2012 Renesas Solutions Corp.
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/include/ "skeleton.dtsi"
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/ {
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compatible = "renesas,emev2";
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interrupt-parent = <&gic>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a9";
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reg = <0>;
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};
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cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a9";
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reg = <1>;
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};
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};
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gic: interrupt-controller@e0020000 {
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compatible = "arm,cortex-a9-gic";
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interrupt-controller;
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#interrupt-cells = <3>;
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reg = <0xe0028000 0x1000>,
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<0xe0020000 0x0100>;
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};
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sti@e0180000 {
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compatible = "renesas,em-sti";
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reg = <0xe0180000 0x54>;
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interrupts = <0 125 0>;
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};
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uart@e1020000 {
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compatible = "renesas,em-uart";
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reg = <0xe1020000 0x38>;
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interrupts = <0 8 0>;
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};
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uart@e1030000 {
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compatible = "renesas,em-uart";
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reg = <0xe1030000 0x38>;
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interrupts = <0 9 0>;
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};
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uart@e1040000 {
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compatible = "renesas,em-uart";
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reg = <0xe1040000 0x38>;
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interrupts = <0 10 0>;
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};
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uart@e1050000 {
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compatible = "renesas,em-uart";
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reg = <0xe1050000 0x38>;
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interrupts = <0 11 0>;
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};
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};
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