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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-04 16:16:46 +07:00
7d96920488
Sanity checks against AR5K_NUM_GPIO were all broken. This doesn't currently cause any problems since we only use the first four gpios. Changes-licensed-under: ISC Reported-by: Andreas Mohr <andi@lisas.de> Signed-off-by: Bob Copeland <me@bobcopeland.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
177 lines
4.0 KiB
C
177 lines
4.0 KiB
C
/*
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* Copyright (c) 2004-2008 Reyk Floeter <reyk@openbsd.org>
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* Copyright (c) 2006-2008 Nick Kossifidis <mickflemm@gmail.com>
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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/****************\
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GPIO Functions
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\****************/
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#include "ath5k.h"
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#include "reg.h"
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#include "debug.h"
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#include "base.h"
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/*
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* Set led state
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*/
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void ath5k_hw_set_ledstate(struct ath5k_hw *ah, unsigned int state)
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{
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u32 led;
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/*5210 has different led mode handling*/
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u32 led_5210;
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ATH5K_TRACE(ah->ah_sc);
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/*Reset led status*/
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if (ah->ah_version != AR5K_AR5210)
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AR5K_REG_DISABLE_BITS(ah, AR5K_PCICFG,
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AR5K_PCICFG_LEDMODE | AR5K_PCICFG_LED);
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else
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AR5K_REG_DISABLE_BITS(ah, AR5K_PCICFG, AR5K_PCICFG_LED);
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/*
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* Some blinking values, define at your wish
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*/
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switch (state) {
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case AR5K_LED_SCAN:
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case AR5K_LED_AUTH:
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led = AR5K_PCICFG_LEDMODE_PROP | AR5K_PCICFG_LED_PEND;
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led_5210 = AR5K_PCICFG_LED_PEND | AR5K_PCICFG_LED_BCTL;
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break;
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case AR5K_LED_INIT:
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led = AR5K_PCICFG_LEDMODE_PROP | AR5K_PCICFG_LED_NONE;
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led_5210 = AR5K_PCICFG_LED_PEND;
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break;
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case AR5K_LED_ASSOC:
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case AR5K_LED_RUN:
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led = AR5K_PCICFG_LEDMODE_PROP | AR5K_PCICFG_LED_ASSOC;
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led_5210 = AR5K_PCICFG_LED_ASSOC;
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break;
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default:
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led = AR5K_PCICFG_LEDMODE_PROM | AR5K_PCICFG_LED_NONE;
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led_5210 = AR5K_PCICFG_LED_PEND;
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break;
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}
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/*Write new status to the register*/
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if (ah->ah_version != AR5K_AR5210)
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AR5K_REG_ENABLE_BITS(ah, AR5K_PCICFG, led);
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else
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AR5K_REG_ENABLE_BITS(ah, AR5K_PCICFG, led_5210);
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}
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/*
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* Set GPIO inputs
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*/
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int ath5k_hw_set_gpio_input(struct ath5k_hw *ah, u32 gpio)
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{
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ATH5K_TRACE(ah->ah_sc);
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if (gpio >= AR5K_NUM_GPIO)
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return -EINVAL;
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ath5k_hw_reg_write(ah,
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(ath5k_hw_reg_read(ah, AR5K_GPIOCR) & ~AR5K_GPIOCR_OUT(gpio))
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| AR5K_GPIOCR_IN(gpio), AR5K_GPIOCR);
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return 0;
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}
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/*
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* Set GPIO outputs
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*/
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int ath5k_hw_set_gpio_output(struct ath5k_hw *ah, u32 gpio)
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{
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ATH5K_TRACE(ah->ah_sc);
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if (gpio >= AR5K_NUM_GPIO)
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return -EINVAL;
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ath5k_hw_reg_write(ah,
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(ath5k_hw_reg_read(ah, AR5K_GPIOCR) & ~AR5K_GPIOCR_OUT(gpio))
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| AR5K_GPIOCR_OUT(gpio), AR5K_GPIOCR);
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return 0;
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}
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/*
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* Get GPIO state
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*/
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u32 ath5k_hw_get_gpio(struct ath5k_hw *ah, u32 gpio)
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{
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ATH5K_TRACE(ah->ah_sc);
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if (gpio >= AR5K_NUM_GPIO)
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return 0xffffffff;
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/* GPIO input magic */
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return ((ath5k_hw_reg_read(ah, AR5K_GPIODI) & AR5K_GPIODI_M) >> gpio) &
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0x1;
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}
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/*
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* Set GPIO state
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*/
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int ath5k_hw_set_gpio(struct ath5k_hw *ah, u32 gpio, u32 val)
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{
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u32 data;
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ATH5K_TRACE(ah->ah_sc);
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if (gpio >= AR5K_NUM_GPIO)
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return -EINVAL;
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/* GPIO output magic */
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data = ath5k_hw_reg_read(ah, AR5K_GPIODO);
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data &= ~(1 << gpio);
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data |= (val & 1) << gpio;
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ath5k_hw_reg_write(ah, data, AR5K_GPIODO);
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return 0;
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}
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/*
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* Initialize the GPIO interrupt (RFKill switch)
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*/
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void ath5k_hw_set_gpio_intr(struct ath5k_hw *ah, unsigned int gpio,
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u32 interrupt_level)
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{
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u32 data;
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ATH5K_TRACE(ah->ah_sc);
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if (gpio >= AR5K_NUM_GPIO)
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return;
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/*
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* Set the GPIO interrupt
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*/
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data = (ath5k_hw_reg_read(ah, AR5K_GPIOCR) &
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~(AR5K_GPIOCR_INT_SEL(gpio) | AR5K_GPIOCR_INT_SELH |
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AR5K_GPIOCR_INT_ENA | AR5K_GPIOCR_OUT(gpio))) |
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(AR5K_GPIOCR_INT_SEL(gpio) | AR5K_GPIOCR_INT_ENA);
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ath5k_hw_reg_write(ah, interrupt_level ? data :
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(data | AR5K_GPIOCR_INT_SELH), AR5K_GPIOCR);
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ah->ah_imr |= AR5K_IMR_GPIO;
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/* Enable GPIO interrupts */
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AR5K_REG_ENABLE_BITS(ah, AR5K_PIMR, AR5K_IMR_GPIO);
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}
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