mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-24 19:00:53 +07:00
b4931afcde
If a vcpu disables LPIs at its redistributor level, we need to make sure we won't pend more interrupts. For this, we need to invalidate the LPI translation cache. Tested-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Marc Zyngier <maz@kernel.org> |
||
---|---|---|
.. | ||
hyp | ||
vgic | ||
aarch32.c | ||
arch_timer.c | ||
arm.c | ||
mmio.c | ||
mmu.c | ||
perf.c | ||
pmu.c | ||
psci.c | ||
trace.h |