mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-05 11:16:41 +07:00
ecc1241e80
Since
commit 43cc71eed1
Author: Kay Sievers <kay.sievers@vrfy.org>
Date: Sat Aug 18 04:40:39 2007 +0200
platform: prefix MODALIAS with "platform:"
the platform modalias is prefixed with "platform:". Add MODULE_ALIAS()
to the hotpluggable SCSI platform drivers, to re-enable auto loading.
[dbrownell@users.sourceforge.net: more drivers, registration fixes]
[akpm@linux-foundation.org: fix sgiwd93.c]
Signed-off-by: Kay Sievers <kay.sievers@vrfy.org>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
319 lines
7.2 KiB
C
319 lines
7.2 KiB
C
/* sun3x_esp.c: ESP front-end for Sun3x systems.
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*
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* Copyright (C) 2007,2008 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/delay.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/interrupt.h>
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#include <asm/sun3x.h>
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#include <asm/io.h>
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#include <asm/dma.h>
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#include <asm/dvma.h>
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/* DMA controller reg offsets */
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#define DMA_CSR 0x00UL /* rw DMA control/status register 0x00 */
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#define DMA_ADDR 0x04UL /* rw DMA transfer address register 0x04 */
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#define DMA_COUNT 0x08UL /* rw DMA transfer count register 0x08 */
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#define DMA_TEST 0x0cUL /* rw DMA test/debug register 0x0c */
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#include <scsi/scsi_host.h>
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#include "esp_scsi.h"
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#define DRV_MODULE_NAME "sun3x_esp"
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#define PFX DRV_MODULE_NAME ": "
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#define DRV_VERSION "1.000"
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#define DRV_MODULE_RELDATE "Nov 1, 2007"
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/*
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* m68k always assumes readl/writel operate on little endian
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* mmio space; this is wrong at least for Sun3x, so we
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* need to workaround this until a proper way is found
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*/
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#if 0
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#define dma_read32(REG) \
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readl(esp->dma_regs + (REG))
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#define dma_write32(VAL, REG) \
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writel((VAL), esp->dma_regs + (REG))
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#else
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#define dma_read32(REG) \
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*(volatile u32 *)(esp->dma_regs + (REG))
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#define dma_write32(VAL, REG) \
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do { *(volatile u32 *)(esp->dma_regs + (REG)) = (VAL); } while (0)
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#endif
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static void sun3x_esp_write8(struct esp *esp, u8 val, unsigned long reg)
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{
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writeb(val, esp->regs + (reg * 4UL));
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}
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static u8 sun3x_esp_read8(struct esp *esp, unsigned long reg)
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{
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return readb(esp->regs + (reg * 4UL));
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}
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static dma_addr_t sun3x_esp_map_single(struct esp *esp, void *buf,
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size_t sz, int dir)
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{
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return dma_map_single(esp->dev, buf, sz, dir);
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}
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static int sun3x_esp_map_sg(struct esp *esp, struct scatterlist *sg,
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int num_sg, int dir)
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{
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return dma_map_sg(esp->dev, sg, num_sg, dir);
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}
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static void sun3x_esp_unmap_single(struct esp *esp, dma_addr_t addr,
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size_t sz, int dir)
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{
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dma_unmap_single(esp->dev, addr, sz, dir);
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}
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static void sun3x_esp_unmap_sg(struct esp *esp, struct scatterlist *sg,
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int num_sg, int dir)
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{
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dma_unmap_sg(esp->dev, sg, num_sg, dir);
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}
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static int sun3x_esp_irq_pending(struct esp *esp)
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{
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if (dma_read32(DMA_CSR) & (DMA_HNDL_INTR | DMA_HNDL_ERROR))
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return 1;
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return 0;
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}
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static void sun3x_esp_reset_dma(struct esp *esp)
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{
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u32 val;
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val = dma_read32(DMA_CSR);
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dma_write32(val | DMA_RST_SCSI, DMA_CSR);
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dma_write32(val & ~DMA_RST_SCSI, DMA_CSR);
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/* Enable interrupts. */
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val = dma_read32(DMA_CSR);
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dma_write32(val | DMA_INT_ENAB, DMA_CSR);
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}
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static void sun3x_esp_dma_drain(struct esp *esp)
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{
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u32 csr;
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int lim;
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csr = dma_read32(DMA_CSR);
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if (!(csr & DMA_FIFO_ISDRAIN))
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return;
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dma_write32(csr | DMA_FIFO_STDRAIN, DMA_CSR);
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lim = 1000;
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while (dma_read32(DMA_CSR) & DMA_FIFO_ISDRAIN) {
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if (--lim == 0) {
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printk(KERN_ALERT PFX "esp%d: DMA will not drain!\n",
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esp->host->unique_id);
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break;
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}
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udelay(1);
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}
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}
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static void sun3x_esp_dma_invalidate(struct esp *esp)
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{
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u32 val;
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int lim;
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lim = 1000;
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while ((val = dma_read32(DMA_CSR)) & DMA_PEND_READ) {
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if (--lim == 0) {
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printk(KERN_ALERT PFX "esp%d: DMA will not "
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"invalidate!\n", esp->host->unique_id);
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break;
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}
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udelay(1);
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}
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val &= ~(DMA_ENABLE | DMA_ST_WRITE | DMA_BCNT_ENAB);
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val |= DMA_FIFO_INV;
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dma_write32(val, DMA_CSR);
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val &= ~DMA_FIFO_INV;
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dma_write32(val, DMA_CSR);
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}
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static void sun3x_esp_send_dma_cmd(struct esp *esp, u32 addr, u32 esp_count,
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u32 dma_count, int write, u8 cmd)
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{
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u32 csr;
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BUG_ON(!(cmd & ESP_CMD_DMA));
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sun3x_esp_write8(esp, (esp_count >> 0) & 0xff, ESP_TCLOW);
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sun3x_esp_write8(esp, (esp_count >> 8) & 0xff, ESP_TCMED);
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csr = dma_read32(DMA_CSR);
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csr |= DMA_ENABLE;
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if (write)
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csr |= DMA_ST_WRITE;
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else
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csr &= ~DMA_ST_WRITE;
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dma_write32(csr, DMA_CSR);
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dma_write32(addr, DMA_ADDR);
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scsi_esp_cmd(esp, cmd);
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}
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static int sun3x_esp_dma_error(struct esp *esp)
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{
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u32 csr = dma_read32(DMA_CSR);
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if (csr & DMA_HNDL_ERROR)
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return 1;
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return 0;
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}
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static const struct esp_driver_ops sun3x_esp_ops = {
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.esp_write8 = sun3x_esp_write8,
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.esp_read8 = sun3x_esp_read8,
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.map_single = sun3x_esp_map_single,
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.map_sg = sun3x_esp_map_sg,
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.unmap_single = sun3x_esp_unmap_single,
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.unmap_sg = sun3x_esp_unmap_sg,
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.irq_pending = sun3x_esp_irq_pending,
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.reset_dma = sun3x_esp_reset_dma,
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.dma_drain = sun3x_esp_dma_drain,
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.dma_invalidate = sun3x_esp_dma_invalidate,
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.send_dma_cmd = sun3x_esp_send_dma_cmd,
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.dma_error = sun3x_esp_dma_error,
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};
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static int __devinit esp_sun3x_probe(struct platform_device *dev)
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{
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struct scsi_host_template *tpnt = &scsi_esp_template;
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struct Scsi_Host *host;
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struct esp *esp;
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struct resource *res;
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int err = -ENOMEM;
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host = scsi_host_alloc(tpnt, sizeof(struct esp));
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if (!host)
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goto fail;
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host->max_id = 8;
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esp = shost_priv(host);
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esp->host = host;
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esp->dev = dev;
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esp->ops = &sun3x_esp_ops;
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res = platform_get_resource(dev, IORESOURCE_MEM, 0);
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if (!res && !res->start)
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goto fail_unlink;
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esp->regs = ioremap_nocache(res->start, 0x20);
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if (!esp->regs)
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goto fail_unmap_regs;
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res = platform_get_resource(dev, IORESOURCE_MEM, 1);
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if (!res && !res->start)
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goto fail_unmap_regs;
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esp->dma_regs = ioremap_nocache(res->start, 0x10);
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esp->command_block = dma_alloc_coherent(esp->dev, 16,
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&esp->command_block_dma,
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GFP_KERNEL);
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if (!esp->command_block)
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goto fail_unmap_regs_dma;
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host->irq = platform_get_irq(dev, 0);
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err = request_irq(host->irq, scsi_esp_intr, IRQF_SHARED,
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"SUN3X ESP", esp);
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if (err < 0)
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goto fail_unmap_command_block;
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esp->scsi_id = 7;
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esp->host->this_id = esp->scsi_id;
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esp->scsi_id_mask = (1 << esp->scsi_id);
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esp->cfreq = 20000000;
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dev_set_drvdata(&dev->dev, esp);
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err = scsi_esp_register(esp, &dev->dev);
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if (err)
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goto fail_free_irq;
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return 0;
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fail_free_irq:
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free_irq(host->irq, esp);
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fail_unmap_command_block:
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dma_free_coherent(esp->dev, 16,
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esp->command_block,
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esp->command_block_dma);
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fail_unmap_regs_dma:
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iounmap(esp->dma_regs);
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fail_unmap_regs:
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iounmap(esp->regs);
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fail_unlink:
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scsi_host_put(host);
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fail:
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return err;
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}
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static int __devexit esp_sun3x_remove(struct platform_device *dev)
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{
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struct esp *esp = dev_get_drvdata(&dev->dev);
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unsigned int irq = esp->host->irq;
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u32 val;
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scsi_esp_unregister(esp);
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/* Disable interrupts. */
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val = dma_read32(DMA_CSR);
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dma_write32(val & ~DMA_INT_ENAB, DMA_CSR);
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free_irq(irq, esp);
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dma_free_coherent(esp->dev, 16,
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esp->command_block,
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esp->command_block_dma);
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scsi_host_put(esp->host);
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return 0;
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}
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static struct platform_driver esp_sun3x_driver = {
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.probe = esp_sun3x_probe,
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.remove = __devexit_p(esp_sun3x_remove),
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.driver = {
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.name = "sun3x_esp",
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.owner = THIS_MODULE,
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},
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};
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static int __init sun3x_esp_init(void)
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{
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return platform_driver_register(&esp_sun3x_driver);
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}
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static void __exit sun3x_esp_exit(void)
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{
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platform_driver_unregister(&esp_sun3x_driver);
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}
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MODULE_DESCRIPTION("Sun3x ESP SCSI driver");
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MODULE_AUTHOR("Thomas Bogendoerfer (tsbogend@alpha.franken.de)");
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MODULE_LICENSE("GPL");
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MODULE_VERSION(DRV_VERSION);
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module_init(sun3x_esp_init);
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module_exit(sun3x_esp_exit);
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MODULE_ALIAS("platform:sun3x_esp");
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