mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-21 20:43:51 +07:00
b4161f0bb5
Updated the generic SPI EEPROM driver AT25 for support of an additional address bit in the instruction byte. Certain EEPROMS have a size that is larger than the number of address bytes would allow (e.g. like M95040 from ST that has 512 Byte size but uses only one address byte (A0 to A7) for addressing.) For the extra address bit (A8, A16 or A24) bit 3 of the instruction byte is used. This instruction bit is normally defined as don't care for other AT25 like chips. Reviewed-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Ivo Sieben <meltedpianoman@gmail.com> Acked-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
427 lines
10 KiB
C
427 lines
10 KiB
C
/*
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* at25.c -- support most SPI EEPROMs, such as Atmel AT25 models
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*
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* Copyright (C) 2006 David Brownell
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/sched.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/eeprom.h>
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/*
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* NOTE: this is an *EEPROM* driver. The vagaries of product naming
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* mean that some AT25 products are EEPROMs, and others are FLASH.
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* Handle FLASH chips with the drivers/mtd/devices/m25p80.c driver,
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* not this one!
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*/
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struct at25_data {
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struct spi_device *spi;
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struct memory_accessor mem;
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struct mutex lock;
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struct spi_eeprom chip;
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struct bin_attribute bin;
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unsigned addrlen;
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};
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#define AT25_WREN 0x06 /* latch the write enable */
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#define AT25_WRDI 0x04 /* reset the write enable */
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#define AT25_RDSR 0x05 /* read status register */
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#define AT25_WRSR 0x01 /* write status register */
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#define AT25_READ 0x03 /* read byte(s) */
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#define AT25_WRITE 0x02 /* write byte(s)/sector */
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#define AT25_SR_nRDY 0x01 /* nRDY = write-in-progress */
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#define AT25_SR_WEN 0x02 /* write enable (latched) */
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#define AT25_SR_BP0 0x04 /* BP for software writeprotect */
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#define AT25_SR_BP1 0x08
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#define AT25_SR_WPEN 0x80 /* writeprotect enable */
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#define AT25_INSTR_BIT3 0x08 /* Additional address bit in instr */
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#define EE_MAXADDRLEN 3 /* 24 bit addresses, up to 2 MBytes */
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/* Specs often allow 5 msec for a page write, sometimes 20 msec;
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* it's important to recover from write timeouts.
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*/
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#define EE_TIMEOUT 25
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/*-------------------------------------------------------------------------*/
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#define io_limit PAGE_SIZE /* bytes */
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static ssize_t
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at25_ee_read(
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struct at25_data *at25,
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char *buf,
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unsigned offset,
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size_t count
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)
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{
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u8 command[EE_MAXADDRLEN + 1];
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u8 *cp;
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ssize_t status;
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struct spi_transfer t[2];
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struct spi_message m;
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u8 instr;
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if (unlikely(offset >= at25->bin.size))
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return 0;
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if ((offset + count) > at25->bin.size)
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count = at25->bin.size - offset;
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if (unlikely(!count))
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return count;
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cp = command;
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instr = AT25_READ;
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if (at25->chip.flags & EE_INSTR_BIT3_IS_ADDR)
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if (offset >= (1U << (at25->addrlen * 8)))
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instr |= AT25_INSTR_BIT3;
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*cp++ = instr;
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/* 8/16/24-bit address is written MSB first */
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switch (at25->addrlen) {
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default: /* case 3 */
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*cp++ = offset >> 16;
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case 2:
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*cp++ = offset >> 8;
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case 1:
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case 0: /* can't happen: for better codegen */
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*cp++ = offset >> 0;
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}
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spi_message_init(&m);
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memset(t, 0, sizeof t);
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t[0].tx_buf = command;
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t[0].len = at25->addrlen + 1;
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spi_message_add_tail(&t[0], &m);
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t[1].rx_buf = buf;
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t[1].len = count;
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spi_message_add_tail(&t[1], &m);
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mutex_lock(&at25->lock);
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/* Read it all at once.
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*
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* REVISIT that's potentially a problem with large chips, if
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* other devices on the bus need to be accessed regularly or
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* this chip is clocked very slowly
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*/
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status = spi_sync(at25->spi, &m);
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dev_dbg(&at25->spi->dev,
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"read %Zd bytes at %d --> %d\n",
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count, offset, (int) status);
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mutex_unlock(&at25->lock);
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return status ? status : count;
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}
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static ssize_t
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at25_bin_read(struct file *filp, struct kobject *kobj,
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struct bin_attribute *bin_attr,
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char *buf, loff_t off, size_t count)
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{
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struct device *dev;
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struct at25_data *at25;
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dev = container_of(kobj, struct device, kobj);
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at25 = dev_get_drvdata(dev);
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return at25_ee_read(at25, buf, off, count);
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}
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static ssize_t
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at25_ee_write(struct at25_data *at25, const char *buf, loff_t off,
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size_t count)
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{
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ssize_t status = 0;
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unsigned written = 0;
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unsigned buf_size;
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u8 *bounce;
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if (unlikely(off >= at25->bin.size))
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return -EFBIG;
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if ((off + count) > at25->bin.size)
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count = at25->bin.size - off;
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if (unlikely(!count))
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return count;
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/* Temp buffer starts with command and address */
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buf_size = at25->chip.page_size;
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if (buf_size > io_limit)
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buf_size = io_limit;
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bounce = kmalloc(buf_size + at25->addrlen + 1, GFP_KERNEL);
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if (!bounce)
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return -ENOMEM;
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/* For write, rollover is within the page ... so we write at
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* most one page, then manually roll over to the next page.
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*/
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mutex_lock(&at25->lock);
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do {
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unsigned long timeout, retries;
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unsigned segment;
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unsigned offset = (unsigned) off;
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u8 *cp = bounce;
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int sr;
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u8 instr;
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*cp = AT25_WREN;
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status = spi_write(at25->spi, cp, 1);
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if (status < 0) {
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dev_dbg(&at25->spi->dev, "WREN --> %d\n",
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(int) status);
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break;
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}
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instr = AT25_WRITE;
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if (at25->chip.flags & EE_INSTR_BIT3_IS_ADDR)
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if (offset >= (1U << (at25->addrlen * 8)))
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instr |= AT25_INSTR_BIT3;
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*cp++ = instr;
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/* 8/16/24-bit address is written MSB first */
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switch (at25->addrlen) {
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default: /* case 3 */
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*cp++ = offset >> 16;
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case 2:
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*cp++ = offset >> 8;
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case 1:
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case 0: /* can't happen: for better codegen */
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*cp++ = offset >> 0;
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}
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/* Write as much of a page as we can */
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segment = buf_size - (offset % buf_size);
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if (segment > count)
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segment = count;
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memcpy(cp, buf, segment);
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status = spi_write(at25->spi, bounce,
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segment + at25->addrlen + 1);
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dev_dbg(&at25->spi->dev,
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"write %u bytes at %u --> %d\n",
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segment, offset, (int) status);
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if (status < 0)
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break;
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/* REVISIT this should detect (or prevent) failed writes
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* to readonly sections of the EEPROM...
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*/
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/* Wait for non-busy status */
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timeout = jiffies + msecs_to_jiffies(EE_TIMEOUT);
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retries = 0;
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do {
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sr = spi_w8r8(at25->spi, AT25_RDSR);
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if (sr < 0 || (sr & AT25_SR_nRDY)) {
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dev_dbg(&at25->spi->dev,
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"rdsr --> %d (%02x)\n", sr, sr);
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/* at HZ=100, this is sloooow */
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msleep(1);
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continue;
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}
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if (!(sr & AT25_SR_nRDY))
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break;
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} while (retries++ < 3 || time_before_eq(jiffies, timeout));
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if ((sr < 0) || (sr & AT25_SR_nRDY)) {
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dev_err(&at25->spi->dev,
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"write %d bytes offset %d, "
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"timeout after %u msecs\n",
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segment, offset,
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jiffies_to_msecs(jiffies -
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(timeout - EE_TIMEOUT)));
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status = -ETIMEDOUT;
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break;
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}
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off += segment;
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buf += segment;
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count -= segment;
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written += segment;
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} while (count > 0);
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mutex_unlock(&at25->lock);
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kfree(bounce);
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return written ? written : status;
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}
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static ssize_t
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at25_bin_write(struct file *filp, struct kobject *kobj,
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struct bin_attribute *bin_attr,
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char *buf, loff_t off, size_t count)
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{
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struct device *dev;
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struct at25_data *at25;
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dev = container_of(kobj, struct device, kobj);
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at25 = dev_get_drvdata(dev);
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return at25_ee_write(at25, buf, off, count);
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}
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/*-------------------------------------------------------------------------*/
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/* Let in-kernel code access the eeprom data. */
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static ssize_t at25_mem_read(struct memory_accessor *mem, char *buf,
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off_t offset, size_t count)
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{
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struct at25_data *at25 = container_of(mem, struct at25_data, mem);
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return at25_ee_read(at25, buf, offset, count);
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}
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static ssize_t at25_mem_write(struct memory_accessor *mem, const char *buf,
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off_t offset, size_t count)
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{
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struct at25_data *at25 = container_of(mem, struct at25_data, mem);
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return at25_ee_write(at25, buf, offset, count);
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}
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/*-------------------------------------------------------------------------*/
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static int at25_probe(struct spi_device *spi)
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{
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struct at25_data *at25 = NULL;
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const struct spi_eeprom *chip;
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int err;
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int sr;
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int addrlen;
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/* Chip description */
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chip = spi->dev.platform_data;
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if (!chip) {
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dev_dbg(&spi->dev, "no chip description\n");
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err = -ENODEV;
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goto fail;
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}
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/* For now we only support 8/16/24 bit addressing */
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if (chip->flags & EE_ADDR1)
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addrlen = 1;
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else if (chip->flags & EE_ADDR2)
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addrlen = 2;
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else if (chip->flags & EE_ADDR3)
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addrlen = 3;
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else {
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dev_dbg(&spi->dev, "unsupported address type\n");
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err = -EINVAL;
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goto fail;
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}
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/* Ping the chip ... the status register is pretty portable,
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* unlike probing manufacturer IDs. We do expect that system
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* firmware didn't write it in the past few milliseconds!
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*/
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sr = spi_w8r8(spi, AT25_RDSR);
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if (sr < 0 || sr & AT25_SR_nRDY) {
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dev_dbg(&spi->dev, "rdsr --> %d (%02x)\n", sr, sr);
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err = -ENXIO;
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goto fail;
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}
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if (!(at25 = kzalloc(sizeof *at25, GFP_KERNEL))) {
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err = -ENOMEM;
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goto fail;
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}
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mutex_init(&at25->lock);
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at25->chip = *chip;
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at25->spi = spi_dev_get(spi);
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dev_set_drvdata(&spi->dev, at25);
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at25->addrlen = addrlen;
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/* Export the EEPROM bytes through sysfs, since that's convenient.
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* And maybe to other kernel code; it might hold a board's Ethernet
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* address, or board-specific calibration data generated on the
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* manufacturing floor.
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*
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* Default to root-only access to the data; EEPROMs often hold data
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* that's sensitive for read and/or write, like ethernet addresses,
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* security codes, board-specific manufacturing calibrations, etc.
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*/
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sysfs_bin_attr_init(&at25->bin);
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at25->bin.attr.name = "eeprom";
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at25->bin.attr.mode = S_IRUSR;
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at25->bin.read = at25_bin_read;
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at25->mem.read = at25_mem_read;
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at25->bin.size = at25->chip.byte_len;
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if (!(chip->flags & EE_READONLY)) {
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at25->bin.write = at25_bin_write;
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at25->bin.attr.mode |= S_IWUSR;
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at25->mem.write = at25_mem_write;
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}
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err = sysfs_create_bin_file(&spi->dev.kobj, &at25->bin);
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if (err)
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goto fail;
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if (chip->setup)
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chip->setup(&at25->mem, chip->context);
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dev_info(&spi->dev, "%Zd %s %s eeprom%s, pagesize %u\n",
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(at25->bin.size < 1024)
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? at25->bin.size
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: (at25->bin.size / 1024),
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(at25->bin.size < 1024) ? "Byte" : "KByte",
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at25->chip.name,
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(chip->flags & EE_READONLY) ? " (readonly)" : "",
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at25->chip.page_size);
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return 0;
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fail:
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dev_dbg(&spi->dev, "probe err %d\n", err);
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kfree(at25);
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return err;
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}
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static int __devexit at25_remove(struct spi_device *spi)
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{
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struct at25_data *at25;
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at25 = dev_get_drvdata(&spi->dev);
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sysfs_remove_bin_file(&spi->dev.kobj, &at25->bin);
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kfree(at25);
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return 0;
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}
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/*-------------------------------------------------------------------------*/
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static struct spi_driver at25_driver = {
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.driver = {
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.name = "at25",
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.owner = THIS_MODULE,
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},
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.probe = at25_probe,
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.remove = __devexit_p(at25_remove),
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};
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module_spi_driver(at25_driver);
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MODULE_DESCRIPTION("Driver for most SPI EEPROMs");
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MODULE_AUTHOR("David Brownell");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("spi:at25");
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