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c05ec3d4d7
As per the DT phy-mode specification, RGMII delays are applied by the MAC when there is no PHY present on the link. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
210 lines
6.5 KiB
C
210 lines
6.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0
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* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH
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* Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com>
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*/
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#ifndef _SJA1105_H
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#define _SJA1105_H
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#include <linux/ptp_clock_kernel.h>
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#include <linux/timecounter.h>
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#include <linux/dsa/sja1105.h>
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#include <net/dsa.h>
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#include <linux/mutex.h>
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#include "sja1105_static_config.h"
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#define SJA1105_NUM_PORTS 5
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#define SJA1105_NUM_TC 8
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#define SJA1105ET_FDB_BIN_SIZE 4
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/* The hardware value is in multiples of 10 ms.
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* The passed parameter is in multiples of 1 ms.
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*/
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#define SJA1105_AGEING_TIME_MS(ms) ((ms) / 10)
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/* Keeps the different addresses between E/T and P/Q/R/S */
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struct sja1105_regs {
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u64 device_id;
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u64 prod_id;
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u64 status;
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u64 port_control;
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u64 rgu;
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u64 config;
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u64 rmii_pll1;
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u64 ptp_control;
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u64 ptpclk;
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u64 ptpclkrate;
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u64 ptptsclk;
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u64 ptpegr_ts[SJA1105_NUM_PORTS];
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u64 pad_mii_tx[SJA1105_NUM_PORTS];
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u64 pad_mii_id[SJA1105_NUM_PORTS];
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u64 cgu_idiv[SJA1105_NUM_PORTS];
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u64 mii_tx_clk[SJA1105_NUM_PORTS];
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u64 mii_rx_clk[SJA1105_NUM_PORTS];
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u64 mii_ext_tx_clk[SJA1105_NUM_PORTS];
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u64 mii_ext_rx_clk[SJA1105_NUM_PORTS];
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u64 rgmii_tx_clk[SJA1105_NUM_PORTS];
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u64 rmii_ref_clk[SJA1105_NUM_PORTS];
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u64 rmii_ext_tx_clk[SJA1105_NUM_PORTS];
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u64 mac[SJA1105_NUM_PORTS];
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u64 mac_hl1[SJA1105_NUM_PORTS];
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u64 mac_hl2[SJA1105_NUM_PORTS];
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u64 qlevel[SJA1105_NUM_PORTS];
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};
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struct sja1105_info {
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u64 device_id;
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/* Needed for distinction between P and R, and between Q and S
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* (since the parts with/without SGMII share the same
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* switch core and device_id)
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*/
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u64 part_no;
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/* E/T and P/Q/R/S have partial timestamps of different sizes.
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* They must be reconstructed on both families anyway to get the full
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* 64-bit values back.
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*/
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int ptp_ts_bits;
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/* Also SPI commands are of different sizes to retrieve
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* the egress timestamps.
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*/
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int ptpegr_ts_bytes;
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const struct sja1105_dynamic_table_ops *dyn_ops;
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const struct sja1105_table_ops *static_ops;
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const struct sja1105_regs *regs;
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int (*ptp_cmd)(const void *ctx, const void *data);
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int (*reset_cmd)(const void *ctx, const void *data);
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int (*setup_rgmii_delay)(const void *ctx, int port);
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/* Prototypes from include/net/dsa.h */
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int (*fdb_add_cmd)(struct dsa_switch *ds, int port,
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const unsigned char *addr, u16 vid);
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int (*fdb_del_cmd)(struct dsa_switch *ds, int port,
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const unsigned char *addr, u16 vid);
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const char *name;
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};
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struct sja1105_private {
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struct sja1105_static_config static_config;
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bool rgmii_rx_delay[SJA1105_NUM_PORTS];
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bool rgmii_tx_delay[SJA1105_NUM_PORTS];
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const struct sja1105_info *info;
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struct gpio_desc *reset_gpio;
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struct spi_device *spidev;
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struct dsa_switch *ds;
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struct sja1105_port ports[SJA1105_NUM_PORTS];
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struct ptp_clock_info ptp_caps;
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struct ptp_clock *clock;
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/* The cycle counter translates the PTP timestamps (based on
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* a free-running counter) into a software time domain.
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*/
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struct cyclecounter tstamp_cc;
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struct timecounter tstamp_tc;
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struct delayed_work refresh_work;
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/* Serializes all operations on the cycle counter */
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struct mutex ptp_lock;
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/* Serializes transmission of management frames so that
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* the switch doesn't confuse them with one another.
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*/
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struct mutex mgmt_lock;
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struct sja1105_tagger_data tagger_data;
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};
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#include "sja1105_dynamic_config.h"
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#include "sja1105_ptp.h"
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struct sja1105_spi_message {
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u64 access;
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u64 read_count;
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u64 address;
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};
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typedef enum {
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SPI_READ = 0,
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SPI_WRITE = 1,
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} sja1105_spi_rw_mode_t;
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/* From sja1105_spi.c */
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int sja1105_spi_send_packed_buf(const struct sja1105_private *priv,
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sja1105_spi_rw_mode_t rw, u64 reg_addr,
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void *packed_buf, size_t size_bytes);
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int sja1105_spi_send_int(const struct sja1105_private *priv,
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sja1105_spi_rw_mode_t rw, u64 reg_addr,
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u64 *value, u64 size_bytes);
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int sja1105_spi_send_long_packed_buf(const struct sja1105_private *priv,
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sja1105_spi_rw_mode_t rw, u64 base_addr,
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void *packed_buf, u64 buf_len);
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int sja1105_static_config_upload(struct sja1105_private *priv);
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int sja1105_inhibit_tx(const struct sja1105_private *priv,
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unsigned long port_bitmap, bool tx_inhibited);
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extern struct sja1105_info sja1105e_info;
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extern struct sja1105_info sja1105t_info;
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extern struct sja1105_info sja1105p_info;
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extern struct sja1105_info sja1105q_info;
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extern struct sja1105_info sja1105r_info;
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extern struct sja1105_info sja1105s_info;
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/* From sja1105_clocking.c */
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typedef enum {
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XMII_MAC = 0,
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XMII_PHY = 1,
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} sja1105_mii_role_t;
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typedef enum {
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XMII_MODE_MII = 0,
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XMII_MODE_RMII = 1,
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XMII_MODE_RGMII = 2,
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} sja1105_phy_interface_t;
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typedef enum {
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SJA1105_SPEED_10MBPS = 3,
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SJA1105_SPEED_100MBPS = 2,
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SJA1105_SPEED_1000MBPS = 1,
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SJA1105_SPEED_AUTO = 0,
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} sja1105_speed_t;
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int sja1105pqrs_setup_rgmii_delay(const void *ctx, int port);
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int sja1105_clocking_setup_port(struct sja1105_private *priv, int port);
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int sja1105_clocking_setup(struct sja1105_private *priv);
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/* From sja1105_ethtool.c */
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void sja1105_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data);
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void sja1105_get_strings(struct dsa_switch *ds, int port,
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u32 stringset, u8 *data);
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int sja1105_get_sset_count(struct dsa_switch *ds, int port, int sset);
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/* From sja1105_dynamic_config.c */
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int sja1105_dynamic_config_read(struct sja1105_private *priv,
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enum sja1105_blk_idx blk_idx,
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int index, void *entry);
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int sja1105_dynamic_config_write(struct sja1105_private *priv,
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enum sja1105_blk_idx blk_idx,
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int index, void *entry, bool keep);
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enum sja1105_iotag {
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SJA1105_C_TAG = 0, /* Inner VLAN header */
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SJA1105_S_TAG = 1, /* Outer VLAN header */
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};
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u8 sja1105et_fdb_hash(struct sja1105_private *priv, const u8 *addr, u16 vid);
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int sja1105et_fdb_add(struct dsa_switch *ds, int port,
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const unsigned char *addr, u16 vid);
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int sja1105et_fdb_del(struct dsa_switch *ds, int port,
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const unsigned char *addr, u16 vid);
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int sja1105pqrs_fdb_add(struct dsa_switch *ds, int port,
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const unsigned char *addr, u16 vid);
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int sja1105pqrs_fdb_del(struct dsa_switch *ds, int port,
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const unsigned char *addr, u16 vid);
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/* Common implementations for the static and dynamic configs */
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size_t sja1105_l2_forwarding_entry_packing(void *buf, void *entry_ptr,
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enum packing_op op);
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size_t sja1105pqrs_l2_lookup_entry_packing(void *buf, void *entry_ptr,
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enum packing_op op);
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size_t sja1105et_l2_lookup_entry_packing(void *buf, void *entry_ptr,
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enum packing_op op);
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size_t sja1105_vlan_lookup_entry_packing(void *buf, void *entry_ptr,
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enum packing_op op);
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size_t sja1105pqrs_mac_config_entry_packing(void *buf, void *entry_ptr,
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enum packing_op op);
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#endif
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