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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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19a18d42bf
Like the PLL and MPLL, the controller may require some magic setting to be applied on startup. This is needed when the initial setting is not applied by the boot ROM. The controller need to do it when the setting applies to several clock, like all the MPLLs in the case of g12a. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
67 lines
1.6 KiB
C
67 lines
1.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2019 BayLibre, SAS.
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* Author: Jerome Brunet <jbrunet@baylibre.com>
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*/
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#include <linux/clk-provider.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/mfd/syscon.h>
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#include <linux/regmap.h>
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#include "clk-input.h"
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#include "clk-regmap.h"
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#include "meson-eeclk.h"
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int meson_eeclkc_probe(struct platform_device *pdev)
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{
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const struct meson_eeclkc_data *data;
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struct device *dev = &pdev->dev;
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struct clk_hw *input;
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struct regmap *map;
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int ret, i;
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data = of_device_get_match_data(dev);
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if (!data)
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return -EINVAL;
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/* Get the hhi system controller node */
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map = syscon_node_to_regmap(of_get_parent(dev->of_node));
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if (IS_ERR(map)) {
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dev_err(dev,
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"failed to get HHI regmap\n");
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return PTR_ERR(map);
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}
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if (data->init_count)
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regmap_multi_reg_write(map, data->init_regs, data->init_count);
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input = meson_clk_hw_register_input(dev, "xtal", IN_PREFIX "xtal", 0);
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if (IS_ERR(input)) {
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ret = PTR_ERR(input);
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if (ret != -EPROBE_DEFER)
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dev_err(dev, "failed to get input clock");
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return ret;
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}
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/* Populate regmap for the regmap backed clocks */
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for (i = 0; i < data->regmap_clk_num; i++)
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data->regmap_clks[i]->map = map;
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for (i = 0; i < data->hw_onecell_data->num; i++) {
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/* array might be sparse */
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if (!data->hw_onecell_data->hws[i])
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continue;
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ret = devm_clk_hw_register(dev, data->hw_onecell_data->hws[i]);
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if (ret) {
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dev_err(dev, "Clock registration failed\n");
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return ret;
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}
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}
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return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
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data->hw_onecell_data);
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}
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