mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-05 07:46:53 +07:00
b36ba30c8a
Reset controllers and clock controllers are combined into one IP block on Qualcomm chipsets. Usually a reset signal is associated with each clock branch but sometimes a reset signal is associated with a handful of clocks. Either way the register interface is the same; set a bit to assert a reset and clear a bit to deassert a reset. Add support for these types of resets signals. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org> |
||
|---|---|---|
| .. | ||
| clk-branch.c | ||
| clk-branch.h | ||
| clk-pll.c | ||
| clk-pll.h | ||
| clk-rcg2.c | ||
| clk-rcg.c | ||
| clk-rcg.h | ||
| clk-regmap.c | ||
| clk-regmap.h | ||
| Kconfig | ||
| Makefile | ||
| reset.c | ||
| reset.h | ||